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author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
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committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
commit | 9d419d3b0cfda0f85d88633bd8620cd65ccb0498 (patch) | |
tree | e1fa028a9c3a8d514e67b9bac321519331979dea /llvm/lib/CodeGen/MachineRegisterInfo.cpp | |
parent | 8dc603b03147c91ff4e66b8bfc934aad6c4cb4b3 (diff) | |
download | bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.tar.gz bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.zip |
[CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
Function names should be verb phrases (as they represent actions), and
command-like function should be imperative. The name should be camel
case, and start with a lower case letter (e.g. openFile() or isFoo()).
Differential Revision: https://reviews.llvm.org/D40416
llvm-svn: 319168
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineRegisterInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index dfa0a4af334..a075543aecf 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -183,7 +183,7 @@ void MachineRegisterInfo::verifyUseList(unsigned Reg) const { MachineOperand *MO = &M; MachineInstr *MI = MO->getParent(); if (!MI) { - errs() << PrintReg(Reg, getTargetRegisterInfo()) + errs() << printReg(Reg, getTargetRegisterInfo()) << " use list MachineOperand " << MO << " has no parent instruction.\n"; Valid = false; @@ -192,19 +192,19 @@ void MachineRegisterInfo::verifyUseList(unsigned Reg) const { MachineOperand *MO0 = &MI->getOperand(0); unsigned NumOps = MI->getNumOperands(); if (!(MO >= MO0 && MO < MO0+NumOps)) { - errs() << PrintReg(Reg, getTargetRegisterInfo()) + errs() << printReg(Reg, getTargetRegisterInfo()) << " use list MachineOperand " << MO << " doesn't belong to parent MI: " << *MI; Valid = false; } if (!MO->isReg()) { - errs() << PrintReg(Reg, getTargetRegisterInfo()) + errs() << printReg(Reg, getTargetRegisterInfo()) << " MachineOperand " << MO << ": " << *MO << " is not a register\n"; Valid = false; } if (MO->getReg() != Reg) { - errs() << PrintReg(Reg, getTargetRegisterInfo()) + errs() << printReg(Reg, getTargetRegisterInfo()) << " use-list MachineOperand " << MO << ": " << *MO << " is the wrong register\n"; Valid = false; |