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-rw-r--r--llvm/docs/CodeGenerator.html6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html
index 39eecc12898..0e63faca3cc 100644
--- a/llvm/docs/CodeGenerator.html
+++ b/llvm/docs/CodeGenerator.html
@@ -444,7 +444,11 @@ href="TableGenFundamentals.html">TableGen</a> description of the register file.
<div class="doc_text">
<p>
- TODO
+ <p>The <tt>TargetSubtarget</tt> class is used to provide information about the
+ specific chip set being targeted. A sub-target informs code generation of
+ which instructions are supported, instruction latencies and instruction
+ execution itinerary; i.e., which processing units are used, in what order, and
+ for how long.
</p>
</div>
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