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authorJim Laskey <jlaskey@mac.com>2005-10-17 12:19:10 +0000
committerJim Laskey <jlaskey@mac.com>2005-10-17 12:19:10 +0000
commit87ce5d85bb8962f40b2f066972a062c0c421fafe (patch)
tree837a885bd775b7abbfdbbb13f732f49e09f32a00 /llvm/docs/CodeGenerator.html
parent721f3ce90f712cf831ba23d5f76fe75f1509f35b (diff)
downloadbcm5719-llvm-87ce5d85bb8962f40b2f066972a062c0c421fafe.tar.gz
bcm5719-llvm-87ce5d85bb8962f40b2f066972a062c0c421fafe.zip
As requested, a blurb on sub-targets.
llvm-svn: 23769
Diffstat (limited to 'llvm/docs/CodeGenerator.html')
-rw-r--r--llvm/docs/CodeGenerator.html6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html
index 39eecc12898..0e63faca3cc 100644
--- a/llvm/docs/CodeGenerator.html
+++ b/llvm/docs/CodeGenerator.html
@@ -444,7 +444,11 @@ href="TableGenFundamentals.html">TableGen</a> description of the register file.
<div class="doc_text">
<p>
- TODO
+ <p>The <tt>TargetSubtarget</tt> class is used to provide information about the
+ specific chip set being targeted. A sub-target informs code generation of
+ which instructions are supported, instruction latencies and instruction
+ execution itinerary; i.e., which processing units are used, in what order, and
+ for how long.
</p>
</div>
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