diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 6dabf499245..904d3612f40 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -68,9 +68,8 @@ public: Register SrcReg = MI.getOperand(1).getReg(); const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI); if (SrcBank == &AMDGPU::VCCRegBank) { - const LLT S1 = LLT::scalar(1); const LLT S32 = LLT::scalar(32); - assert(MRI.getType(SrcReg) == S1); + assert(MRI.getType(SrcReg) == LLT::scalar(1)); assert(MRI.getType(DstReg) == S32); assert(NewBank == &AMDGPU::VGPRRegBank); |
