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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-06 22:31:33 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-06 22:31:33 -0500 |
| commit | dc7b84c66c10f47adf22baab0103eb9f6593cd72 (patch) | |
| tree | 4e057711de4d2b2a307a123d0d923db8ade1d219 | |
| parent | e3750cafdb17f5b7431f18c0229bfb597dde4c88 (diff) | |
| download | bcm5719-llvm-dc7b84c66c10f47adf22baab0103eb9f6593cd72.tar.gz bcm5719-llvm-dc7b84c66c10f47adf22baab0103eb9f6593cd72.zip | |
AMDGPU/GlobalISel: Fix unused variable warning in release
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 6dabf499245..904d3612f40 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -68,9 +68,8 @@ public: Register SrcReg = MI.getOperand(1).getReg(); const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI); if (SrcBank == &AMDGPU::VCCRegBank) { - const LLT S1 = LLT::scalar(1); const LLT S32 = LLT::scalar(32); - assert(MRI.getType(SrcReg) == S1); + assert(MRI.getType(SrcReg) == LLT::scalar(1)); assert(MRI.getType(DstReg) == S32); assert(NewBank == &AMDGPU::VGPRRegBank); |
