diff options
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/mips64sinttofpsf.ll | 15 |
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 4591e79316d..b5967155434 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -658,7 +658,7 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) { NVT, N->getOperand(0)); return TLI.makeLibCall(DAG, LC, TLI.getTypeToTransformTo(*DAG.getContext(), RVT), - &Op, 1, false, dl).first; + &Op, 1, Signed, dl).first; } diff --git a/llvm/test/CodeGen/Mips/mips64sinttofpsf.ll b/llvm/test/CodeGen/Mips/mips64sinttofpsf.ll new file mode 100644 index 00000000000..d3d46036f7d --- /dev/null +++ b/llvm/test/CodeGen/Mips/mips64sinttofpsf.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mips64 -mcpu=mips64r2 -soft-float -O0 < %s | FileCheck %s + + +define double @foo() #0 { +entry: + %x = alloca i32, align 4 + store volatile i32 -32, i32* %x, align 4 + %0 = load volatile i32* %x, align 4 + %conv = sitofp i32 %0 to double + ret double %conv + +; CHECK-NOT: dsll +; CHECK-NOT: dsrl + +} |
