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-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 6d565434470..245536f9450 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -4942,6 +4942,9 @@ def : MnemonicAlias<"srsfd", "srsia">;
def : MnemonicAlias<"srsed", "srsib">;
def : MnemonicAlias<"srs", "srsia">;
+// QSAX == QSUBADDX
+def : MnemonicAlias<"qsubaddx", "qsax">;
+
// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
// Note that the write-back output register is a dummy operand for MC (it's
// only meaningful for codegen), so we just pass zero here.
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