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-rw-r--r--llvm/lib/Target/AArch64/AArch64SchedPredExynos.td7
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td
index 967245bcba4..998b0e21e96 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td
@@ -126,14 +126,13 @@ def ExynosShiftExFn : TIIPredicate<
IsArithLogicShiftOp.ValidOpcodes,
MCReturnStatement<
CheckAny<
- [CheckAll<
+ [ExynosCheckShift,
+ CheckAll<
[CheckShiftLSL,
- CheckShiftBy8]>,
- ExynosCheckShift]>>>],
+ CheckShiftBy8]>]>>>],
MCReturnStatement<FalsePred>>>;
def ExynosShiftExPred : MCSchedPredicate<ExynosShiftExFn>;
-
// Identify arithmetic and logic immediate instructions.
def ExynosCheapFn : TIIPredicate<
"isExynosCheapAsMove",
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