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| author | Evandro Menezes <e.menezes@samsung.com> | 2018-12-21 15:51:34 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2018-12-21 15:51:34 +0000 |
| commit | 96c11eceb29ec445cdaebc2d7b4b55f50afd6d14 (patch) | |
| tree | 61445f351e6396e9fc3094e3563e6e19fcb6ea3a | |
| parent | c46751593b43588ecc750961954cf4a2b7ffa4de (diff) | |
| download | bcm5719-llvm-96c11eceb29ec445cdaebc2d7b4b55f50afd6d14.tar.gz bcm5719-llvm-96c11eceb29ec445cdaebc2d7b4b55f50afd6d14.zip | |
[AArch64] Refactor Exynos predicate (NFC)
Change order of conditions in predicate.
llvm-svn: 349918
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedPredExynos.td | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td index 967245bcba4..998b0e21e96 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td +++ b/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td @@ -126,14 +126,13 @@ def ExynosShiftExFn : TIIPredicate< IsArithLogicShiftOp.ValidOpcodes, MCReturnStatement< CheckAny< - [CheckAll< + [ExynosCheckShift, + CheckAll< [CheckShiftLSL, - CheckShiftBy8]>, - ExynosCheckShift]>>>], + CheckShiftBy8]>]>>>], MCReturnStatement<FalsePred>>>; def ExynosShiftExPred : MCSchedPredicate<ExynosShiftExFn>; - // Identify arithmetic and logic immediate instructions. def ExynosCheapFn : TIIPredicate< "isExynosCheapAsMove", |
