diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedM1.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedM1.td b/llvm/lib/Target/AArch64/AArch64SchedM1.td index da403006181..115ee961f34 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedM1.td +++ b/llvm/lib/Target/AArch64/AArch64SchedM1.td @@ -20,7 +20,7 @@ def ExynosM1Model : SchedMachineModel { let IssueWidth = 4; // Up to 4 uops per cycle. let MicroOpBufferSize = 96; // ROB size. - let LoopMicroOpBufferSize = 32; // Instruction queue size. + let LoopMicroOpBufferSize = 24; // Based on the instruction queue size. let LoadLatency = 4; // Optimistic load cases. let MispredictPenalty = 14; // Minimum branch misprediction penalty. let CompleteModel = 0; // Use the default model otherwise. |
