summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorEvandro Menezes <e.menezes@samsung.com>2016-06-20 18:39:41 +0000
committerEvandro Menezes <e.menezes@samsung.com>2016-06-20 18:39:41 +0000
commit8057265cc2e8d60b89972495e9e5e10012c3c81a (patch)
treedd7daa76eb253296a801c1e403cd78be02218fc0
parent11c43d5a37c3b07355d6a6937e047ca182ca14e3 (diff)
downloadbcm5719-llvm-8057265cc2e8d60b89972495e9e5e10012c3c81a.tar.gz
bcm5719-llvm-8057265cc2e8d60b89972495e9e5e10012c3c81a.zip
[AArch64] Adjust the loop buffer size for Exynos M1 (NFC)
llvm-svn: 273185
-rw-r--r--llvm/lib/Target/AArch64/AArch64SchedM1.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedM1.td b/llvm/lib/Target/AArch64/AArch64SchedM1.td
index da403006181..115ee961f34 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedM1.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedM1.td
@@ -20,7 +20,7 @@
def ExynosM1Model : SchedMachineModel {
let IssueWidth = 4; // Up to 4 uops per cycle.
let MicroOpBufferSize = 96; // ROB size.
- let LoopMicroOpBufferSize = 32; // Instruction queue size.
+ let LoopMicroOpBufferSize = 24; // Based on the instruction queue size.
let LoadLatency = 4; // Optimistic load cases.
let MispredictPenalty = 14; // Minimum branch misprediction penalty.
let CompleteModel = 0; // Use the default model otherwise.
OpenPOWER on IntegriCloud