diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/f16c-intrinsics.ll | 12 |
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 859ff378182..6a7c45665e9 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -8257,6 +8257,9 @@ let Predicates = [HasF16C] in { (VCVTPH2PSrm addr:$src)>; def : Pat<(int_x86_vcvtph2ps_128 (vzload_v2i64 addr:$src)), (VCVTPH2PSrm addr:$src)>; + def : Pat<(int_x86_vcvtph2ps_128 (bitconvert + (v2i64 (scalar_to_vector (loadi64 addr:$src))))), + (VCVTPH2PSrm addr:$src)>; def : Pat<(store (f64 (extractelt (bc_v2f64 (v8i16 (int_x86_vcvtps2ph_128 VR128:$src1, i32:$src2))), (iPTR 0))), diff --git a/llvm/test/CodeGen/X86/f16c-intrinsics.ll b/llvm/test/CodeGen/X86/f16c-intrinsics.ll index 485592aeac3..a78022ac550 100644 --- a/llvm/test/CodeGen/X86/f16c-intrinsics.ll +++ b/llvm/test/CodeGen/X86/f16c-intrinsics.ll @@ -61,6 +61,18 @@ define <4 x float> @test_x86_vcvtps2ph_128_scalar(i64* %ptr) { ret <4 x float> %res } +define <4 x float> @test_x86_vcvtps2ph_128_scalar2(i64* %ptr) { +; CHECK-LABEL: test_x86_vcvtps2ph_128_scalar2: +; CHECK-NOT: vmov +; CHECK: vcvtph2ps (% + + %load = load i64, i64* %ptr + %ins = insertelement <2 x i64> undef, i64 %load, i32 0 + %bc = bitcast <2 x i64> %ins to <8 x i16> + %res = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %bc) + ret <4 x float> %res +} + define void @test_x86_vcvtps2ph_256_m(<8 x i16>* nocapture %d, <8 x float> %a) nounwind { entry: ; CHECK-LABEL: test_x86_vcvtps2ph_256_m: |
