diff options
| -rw-r--r-- | llvm/include/llvm/Target/TargetInstrInfo.h | 4 | ||||
| -rw-r--r-- | llvm/include/llvm/Target/TargetOpcodes.h | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h index b9f85a133a3..0a35d4178d9 100644 --- a/llvm/include/llvm/Target/TargetInstrInfo.h +++ b/llvm/include/llvm/Target/TargetInstrInfo.h @@ -62,6 +62,10 @@ public: virtual ~TargetInstrInfo(); + static bool isGenericOpcode(unsigned Opc) { + return Opc <= TargetOpcode::GENERIC_OP_END; + } + /// Given a machine instruction descriptor, returns the register /// class constraint for OpNum, or NULL. const TargetRegisterClass *getRegClass(const MCInstrDesc &TID, diff --git a/llvm/include/llvm/Target/TargetOpcodes.h b/llvm/include/llvm/Target/TargetOpcodes.h index a7e2aa82a28..db37bdb6258 100644 --- a/llvm/include/llvm/Target/TargetOpcodes.h +++ b/llvm/include/llvm/Target/TargetOpcodes.h @@ -128,6 +128,10 @@ enum { /// "zero cost" null checks in managed languages by allowing LLVM to fold /// comparisons into existing memory operations. FAULTING_LOAD_OP = 22, + + /// BUILTIN_OP_END - This must be the last enum value in this list. + /// The target-specific post-isel opcode values start here. + GENERIC_OP_END = FAULTING_LOAD_OP, }; } // end namespace TargetOpcode } // end namespace llvm |
