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| author | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
| commit | 95d9440348a8437fb792052a2238d972bf884bda (patch) | |
| tree | 24fe120bb8bb01995a477832557bd1e1feff757d /llvm/utils/TableGen/X86RecognizableInstr.cpp | |
| parent | f7bf87051acf39128aeb8ce7305a6d58067ac5ac (diff) | |
| download | bcm5719-llvm-95d9440348a8437fb792052a2238d972bf884bda.tar.gz bcm5719-llvm-95d9440348a8437fb792052a2238d972bf884bda.zip | |
Add CLAC/STAC instruction encoding/decoding support
As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.
llvm-svn: 179266
Diffstat (limited to 'llvm/utils/TableGen/X86RecognizableInstr.cpp')
| -rw-r--r-- | llvm/utils/TableGen/X86RecognizableInstr.cpp | 36 |
1 files changed, 19 insertions, 17 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp index 61b9813b06b..46f2052b010 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.cpp +++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp @@ -29,23 +29,25 @@ using namespace llvm; MAP(C4, 36) \ MAP(C8, 37) \ MAP(C9, 38) \ - MAP(E8, 39) \ - MAP(F0, 40) \ - MAP(F8, 41) \ - MAP(F9, 42) \ - MAP(D0, 45) \ - MAP(D1, 46) \ - MAP(D4, 47) \ - MAP(D5, 48) \ - MAP(D6, 49) \ - MAP(D8, 50) \ - MAP(D9, 51) \ - MAP(DA, 52) \ - MAP(DB, 53) \ - MAP(DC, 54) \ - MAP(DD, 55) \ - MAP(DE, 56) \ - MAP(DF, 57) + MAP(CA, 39) \ + MAP(CB, 40) \ + MAP(E8, 41) \ + MAP(F0, 42) \ + MAP(F8, 45) \ + MAP(F9, 46) \ + MAP(D0, 47) \ + MAP(D1, 48) \ + MAP(D4, 49) \ + MAP(D5, 50) \ + MAP(D6, 51) \ + MAP(D8, 52) \ + MAP(D9, 53) \ + MAP(DA, 54) \ + MAP(DB, 55) \ + MAP(DC, 56) \ + MAP(DD, 57) \ + MAP(DE, 58) \ + MAP(DF, 59) // A clone of X86 since we can't depend on something that is generated. namespace X86Local { |
