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authorDaniel Dunbar <daniel@zuster.org>2010-05-20 20:20:32 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-05-20 20:20:32 +0000
commit5661c0c755212141c5d308047221042679a6f7af (patch)
treeb696e8c6cc33d928ca81200e33a2929b1e7810aa /llvm/utils/TableGen/X86RecognizableInstr.cpp
parent4c4043cf34851078ada1d10679ce3f321925e02e (diff)
downloadbcm5719-llvm-5661c0c755212141c5d308047221042679a6f7af.tar.gz
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tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
it. llvm-svn: 104270
Diffstat (limited to 'llvm/utils/TableGen/X86RecognizableInstr.cpp')
-rw-r--r--llvm/utils/TableGen/X86RecognizableInstr.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 94ed15b0c37..b7085ae6c7b 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -230,6 +230,10 @@ void RecognizableInstr::processInstr(DisassemblerTables &tables,
const CodeGenInstruction &insn,
InstrUID uid)
{
+ // Ignore "asm parser only" instructions.
+ if (insn.TheDef->getValueAsBit("isAsmParserOnly"))
+ return;
+
RecognizableInstr recogInstr(tables, insn, uid);
recogInstr.emitInstructionSpecifier(tables);
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