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| author | Andrew Trick <atrick@apple.com> | 2012-12-05 21:37:42 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-12-05 21:37:42 +0000 |
| commit | 7f7cee39ab83c498ef1853ac1bd2083b4af6a5d1 (patch) | |
| tree | 79fe92b9ad476b8957fac6036b3610149cbf12fb /llvm/utils/TableGen/RegisterInfoEmitter.cpp | |
| parent | b43165b7a5d59d8178dc803ec0351d3a62a38946 (diff) | |
| download | bcm5719-llvm-7f7cee39ab83c498ef1853ac1bd2083b4af6a5d1.tar.gz bcm5719-llvm-7f7cee39ab83c498ef1853ac1bd2083b4af6a5d1.zip | |
RegisterPresssureTracker: Track live physical register by unit.
This is much simpler to reason about, more efficient, and
fixes some corner cases involving implicit super-register defs.
Fixed rdar://12797931.
llvm-svn: 169425
Diffstat (limited to 'llvm/utils/TableGen/RegisterInfoEmitter.cpp')
| -rw-r--r-- | llvm/utils/TableGen/RegisterInfoEmitter.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 935136f0d43..66adb61a328 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -195,7 +195,9 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, } OS << "/// Get the weight in units of pressure for this register unit.\n" << "unsigned " << ClassName << "::\n" - << "getRegUnitWeight(unsigned RegUnit) const {\n"; + << "getRegUnitWeight(unsigned RegUnit) const {\n" + << " assert(RegUnit < " << RegBank.getNumNativeRegUnits() + << " && \"invalid register unit\");\n"; if (!RegUnitsHaveUnitWeight) { OS << " static const uint8_t RUWeightTable[] = {\n "; for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); @@ -290,7 +292,9 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, << "register unit.\n" << "/// Returns a -1 terminated array of pressure set IDs\n" << "const int* " << ClassName << "::\n" - << "getRegUnitPressureSets(unsigned RegUnit) const {\n"; + << "getRegUnitPressureSets(unsigned RegUnit) const {\n" + << " assert(RegUnit < " << RegBank.getNumNativeRegUnits() + << " && \"invalid register unit\");\n"; OS << " static const unsigned RUSetStartTable[] = {\n "; for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits(); UnitIdx < UnitEnd; ++UnitIdx) { |
