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| author | Craig Topper <craig.topper@gmail.com> | 2012-03-05 05:37:41 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-03-05 05:37:41 +0000 |
| commit | 4b02a29ebadf481f00cd19d04294d64d0f446e34 (patch) | |
| tree | 9caa3e131e35f68fad5b7768ec60c3343ebcf60e /llvm/utils/TableGen/RegisterInfoEmitter.cpp | |
| parent | 219ba1969bc8e454c7c3e4eed599865e4ae398fe (diff) | |
| download | bcm5719-llvm-4b02a29ebadf481f00cd19d04294d64d0f446e34.tar.gz bcm5719-llvm-4b02a29ebadf481f00cd19d04294d64d0f446e34.zip | |
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
llvm-svn: 152016
Diffstat (limited to 'llvm/utils/TableGen/RegisterInfoEmitter.cpp')
| -rw-r--r-- | llvm/utils/TableGen/RegisterInfoEmitter.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 0e73e250b47..e01473bb60c 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -288,7 +288,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, } OS << "};\n\n"; - OS << "extern const unsigned " << TargetName << "SubRegsSet[] = {\n"; + OS << "extern const uint16_t " << TargetName << "SubRegsSet[] = {\n"; // Emit the empty sub-registers list OS << " /* Empty_SubRegsSet */ 0,\n"; // Loop over all of the registers which have sub-registers, emitting the @@ -307,7 +307,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, } OS << "};\n\n"; - OS << "extern const unsigned " << TargetName << "SuperRegsSet[] = {\n"; + OS << "extern const uint16_t " << TargetName << "SuperRegsSet[] = {\n"; // Emit the empty super-registers list OS << " /* Empty_SuperRegsSet */ 0,\n"; // Loop over all of the registers which have super-registers, emitting the @@ -629,7 +629,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, // Give the register class a legal C name if it's anonymous. std::string Name = RC.getName(); - OS << "static const unsigned " << Name << "SubclassMask[] = {\n "; + OS << "static const uint32_t " << Name << "SubclassMask[] = {\n "; printBitVectorAsHex(OS, RC.getSubClasses(), 32); OS << "\n};\n\n"; } @@ -863,8 +863,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, OS << " };\n assert(A && B && \"Missing regclass\");\n" << " --Idx;\n" << " assert(Idx < " << SubRegIndices.size() << " && \"Bad subreg\");\n" - << " const unsigned *TV = Table[B->getID()][Idx];\n" - << " const unsigned *SC = A->getSubClassMask();\n" + << " const uint32_t *TV = Table[B->getID()][Idx];\n" + << " const uint32_t *SC = A->getSubClassMask();\n" << " for (unsigned i = 0; i != " << BVWords << "; ++i)\n" << " if (unsigned Common = TV[i] & SC[i])\n" << " return getRegClass(32*i + CountTrailingZeros_32(Common));\n" @@ -875,8 +875,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, // Emit the constructor of the class... OS << "extern const MCRegisterDesc " << TargetName << "RegDesc[];\n"; OS << "extern const uint16_t " << TargetName << "RegOverlaps[];\n"; - OS << "extern const unsigned " << TargetName << "SubRegsSet[];\n"; - OS << "extern const unsigned " << TargetName << "SuperRegsSet[];\n"; + OS << "extern const uint16_t " << TargetName << "SubRegsSet[];\n"; + OS << "extern const uint16_t " << TargetName << "SuperRegsSet[];\n"; if (SubRegIndices.size() != 0) OS << "extern const uint16_t *get" << TargetName << "SubRegTable();\n"; |
