Add support for patterns that have physical registers in them. Testcase:

def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)

llvm-svn: 23815

1 files changed, 12 insertions, 0 deletions

diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index 12ca95f7d0e..0f9d30450ef 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -1617,6 +1617,18 @@ CodeGenPatternResult(TreePatternNode *N, unsigned &Ctr,
   }
   
   if (N->isLeaf()) {
+    // If this is an explicit register reference, handle it.
+    if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
+      unsigned ResNo = Ctr++;
+      if (DI->getDef()->isSubClassOf("Register")) {
+        OS << "      SDOperand Tmp" << ResNo << " = CurDAG->getRegister("
+           << getQualifiedName(DI->getDef()) << ", MVT::"
+           << getEnumName(N->getType())
+           << ");\n";
+        return ResNo;
+      }
+    }
+    
     N->dump();
     assert(0 && "Unknown leaf type!");
     return ~0U;