From b8014e10ae4e8a1cc3880a501bb3fdbf7ada5031 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 19 Oct 2005 02:07:26 +0000 Subject: Add support for patterns that have physical registers in them. Testcase: def : Pat<(trunc G8RC:$in), (OR8To4 G8RC:$in, X0)>; Even though this doesn't make any sense on PPC :) llvm-svn: 23815 --- llvm/utils/TableGen/DAGISelEmitter.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'llvm/utils/TableGen/DAGISelEmitter.cpp') diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp index 12ca95f7d0e..0f9d30450ef 100644 --- a/llvm/utils/TableGen/DAGISelEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelEmitter.cpp @@ -1617,6 +1617,18 @@ CodeGenPatternResult(TreePatternNode *N, unsigned &Ctr, } if (N->isLeaf()) { + // If this is an explicit register reference, handle it. + if (DefInit *DI = dynamic_cast(N->getLeafValue())) { + unsigned ResNo = Ctr++; + if (DI->getDef()->isSubClassOf("Register")) { + OS << " SDOperand Tmp" << ResNo << " = CurDAG->getRegister(" + << getQualifiedName(DI->getDef()) << ", MVT::" + << getEnumName(N->getType()) + << ");\n"; + return ResNo; + } + } + N->dump(); assert(0 && "Unknown leaf type!"); return ~0U; -- cgit v1.2.3