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authorMatthias Braun <matze@braunis.de>2016-06-21 03:24:03 +0000
committerMatthias Braun <matze@braunis.de>2016-06-21 03:24:03 +0000
commit6b1fd9aa63984a96c71c7c3efd0738af7b848072 (patch)
tree2c2a7f6b72bdc71276027176dec5d01daed51ea0 /llvm/utils/TableGen/CodeGenSchedule.h
parente4cf09ad071bd2a2fbe4a926447a69fdc2b7e740 (diff)
downloadbcm5719-llvm-6b1fd9aa63984a96c71c7c3efd0738af7b848072.tar.gz
bcm5719-llvm-6b1fd9aa63984a96c71c7c3efd0738af7b848072.zip
TableGen/CodeGenSchedule: Move some getAllDerivedDefinitions() calls out of inner loops
This cuts the runtime of the two slowest tblgen invocations in aarch64 in half for me... llvm-svn: 273235
Diffstat (limited to 'llvm/utils/TableGen/CodeGenSchedule.h')
-rw-r--r--llvm/utils/TableGen/CodeGenSchedule.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenSchedule.h b/llvm/utils/TableGen/CodeGenSchedule.h
index 62601d941bc..7a236ad0dd8 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.h
+++ b/llvm/utils/TableGen/CodeGenSchedule.h
@@ -241,6 +241,9 @@ class CodeGenSchedModels {
// Any inferred SchedClass has an index greater than NumInstrSchedClassses.
unsigned NumInstrSchedClasses;
+ RecVec ProcResourceDefs;
+ RecVec ProcResGroups;
+
// Map each instruction to its unique SchedClass index considering the
// combination of it's itinerary class, SchedRW list, and InstRW records.
typedef DenseMap<Record*, unsigned> InstClassMapTy;
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