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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-08 22:53:21 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-08 22:53:21 +0000
commit440f69c95aeadb6e4c920d81db50c44c17810d97 (patch)
tree46c5c1a57cb6c39e7f540f62358f27da57e1bf2c /llvm/unittests/CodeGen
parent9b8caf5bd796b25a8a6e457e7b0d73da8163633d (diff)
downloadbcm5719-llvm-440f69c95aeadb6e4c920d81db50c44c17810d97.tar.gz
bcm5719-llvm-440f69c95aeadb6e4c920d81db50c44c17810d97.zip
[CodeGen] Move printing MO_Immediate operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the interfaces. Add support for operand subreg index as an immediate to debug printing and use ::print in the MIRPrinter. Differential Review: https://reviews.llvm.org/D40965 llvm-svn: 320209
Diffstat (limited to 'llvm/unittests/CodeGen')
-rw-r--r--llvm/unittests/CodeGen/MachineOperandTest.cpp19
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/unittests/CodeGen/MachineOperandTest.cpp b/llvm/unittests/CodeGen/MachineOperandTest.cpp
index 4884d374521..24a7f5563ff 100644
--- a/llvm/unittests/CodeGen/MachineOperandTest.cpp
+++ b/llvm/unittests/CodeGen/MachineOperandTest.cpp
@@ -11,6 +11,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/LLVMContext.h"
+#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/Support/raw_ostream.h"
#include "gtest/gtest.h"
@@ -100,4 +101,22 @@ TEST(MachineOperandTest, PrintCImm) {
ASSERT_TRUE(OS.str() == "i128 18446744073709551616");
}
+TEST(MachineOperandTest, PrintSubRegIndex) {
+ // Create a MachineOperand with an immediate and print it as a subreg index.
+ MachineOperand MO = MachineOperand::CreateImm(3);
+
+ // Checking some preconditions on the newly created
+ // MachineOperand.
+ ASSERT_TRUE(MO.isImm());
+ ASSERT_TRUE(MO.getImm() == 3);
+
+ // Print a MachineOperand containing a SubRegIdx. Here we check that without a
+ // TRI and IntrinsicInfo we can print the operand as a subreg index.
+ std::string str;
+ raw_string_ostream OS(str);
+ ModuleSlotTracker DummyMST(nullptr);
+ MachineOperand::printSubregIdx(OS, MO.getImm(), nullptr);
+ ASSERT_TRUE(OS.str() == "%subreg.3");
+}
+
} // end namespace
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