diff options
| author | Javed Absar <javed.absar@arm.com> | 2015-06-08 15:01:11 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2015-06-08 15:01:11 +0000 |
| commit | e1c7dc3ee2b52c101d8498e3ddce55b851962605 (patch) | |
| tree | 6b416eb92ff927e84380674e5270470bf2010e79 /llvm/test | |
| parent | cf197f0bdee1ea4af8cfd3853421de94943f0b1c (diff) | |
| download | bcm5719-llvm-e1c7dc3ee2b52c101d8498e3ddce55b851962605.tar.gz bcm5719-llvm-e1c7dc3ee2b52c101d8498e3ddce55b851962605.zip | |
ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.
llvm-svn: 239302
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/AArch64/basic-a64-diagnostics.s | 4 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/basic-a64-instructions.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt | 2 |
3 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/AArch64/basic-a64-diagnostics.s b/llvm/test/MC/AArch64/basic-a64-diagnostics.s index 1d7ba710a9a..bf7db132b44 100644 --- a/llvm/test/MC/AArch64/basic-a64-diagnostics.s +++ b/llvm/test/MC/AArch64/basic-a64-diagnostics.s @@ -3494,6 +3494,7 @@ msr ID_MMFR1_EL1, x12 msr ID_MMFR2_EL1, x12 msr ID_MMFR3_EL1, x12 + msr ID_MMFR4_EL1, x12 msr ID_ISAR0_EL1, x12 msr ID_ISAR1_EL1, x12 msr ID_ISAR2_EL1, x12 @@ -3587,6 +3588,9 @@ // CHECK-ERROR-NEXT: msr ID_MMFR3_EL1, x12 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected writable system register or pstate +// CHECK-ERROR-NEXT: msr ID_MMFR4_EL1, x12 +// CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: expected writable system register or pstate // CHECK-ERROR-NEXT: msr ID_ISAR0_EL1, x12 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected writable system register or pstate diff --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s index 75c86efd207..5d33a4f933b 100644 --- a/llvm/test/MC/AArch64/basic-a64-instructions.s +++ b/llvm/test/MC/AArch64/basic-a64-instructions.s @@ -4306,6 +4306,7 @@ _func: mrs x9, ID_MMFR1_EL1 mrs x9, ID_MMFR2_EL1 mrs x9, ID_MMFR3_EL1 + mrs x9, ID_MMFR4_EL1 mrs x9, ID_ISAR0_EL1 mrs x9, ID_ISAR1_EL1 mrs x9, ID_ISAR2_EL1 @@ -4606,6 +4607,7 @@ _func: // CHECK: mrs x9, {{id_mmfr1_el1|ID_MMFR1_EL1}} // encoding: [0xa9,0x01,0x38,0xd5] // CHECK: mrs x9, {{id_mmfr2_el1|ID_MMFR2_EL1}} // encoding: [0xc9,0x01,0x38,0xd5] // CHECK: mrs x9, {{id_mmfr3_el1|ID_MMFR3_EL1}} // encoding: [0xe9,0x01,0x38,0xd5] +// CHECK: mrs x9, {{id_mmfr4_el1|ID_MMFR4_EL1}} // encoding: [0xc9,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar0_el1|ID_ISAR0_EL1}} // encoding: [0x09,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar1_el1|ID_ISAR1_EL1}} // encoding: [0x29,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar2_el1|ID_ISAR2_EL1}} // encoding: [0x49,0x02,0x38,0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt index c777f7aa649..615d9ba19ca 100644 --- a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt +++ b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt @@ -3414,6 +3414,7 @@ # CHECK: mrs x9, {{id_mmfr1_el1|ID_MMFR1_EL1}} # CHECK: mrs x9, {{id_mmfr2_el1|ID_MMFR2_EL1}} # CHECK: mrs x9, {{id_mmfr3_el1|ID_MMFR3_EL1}} +# CHECK: mrs x9, {{id_mmfr4_el1|ID_MMFR4_EL1}} # CHECK: mrs x9, {{id_isar0_el1|ID_ISAR0_EL1}} # CHECK: mrs x9, {{id_isar1_el1|ID_ISAR1_EL1}} # CHECK: mrs x9, {{id_isar2_el1|ID_ISAR2_EL1}} @@ -3968,6 +3969,7 @@ 0xa9 0x1 0x38 0xd5 0xc9 0x1 0x38 0xd5 0xe9 0x1 0x38 0xd5 +0xc9 0x2 0x38 0xd5 0x9 0x2 0x38 0xd5 0x29 0x2 0x38 0xd5 0x49 0x2 0x38 0xd5 |
