diff options
5 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp index 28b8e7e29fe..ee85b65bf39 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -175,6 +175,7 @@ const AArch64NamedImmMapper::Mapping AArch64SysReg::MRSMapper::MRSMappings[] = { {"id_mmfr1_el1", ID_MMFR1_EL1, {}}, {"id_mmfr2_el1", ID_MMFR2_EL1, {}}, {"id_mmfr3_el1", ID_MMFR3_EL1, {}}, + {"id_mmfr4_el1", ID_MMFR4_EL1, {}}, {"id_isar0_el1", ID_ISAR0_EL1, {}}, {"id_isar1_el1", ID_ISAR1_EL1, {}}, {"id_isar2_el1", ID_ISAR2_EL1, {}}, diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 7125f14f1a2..7e42f8e3601 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -603,6 +603,7 @@ namespace AArch64SysReg { ISR_EL1 = 0xc608, // 11 000 1100 0001 000 CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 + ID_MMFR4_EL1 = 0xc016, // 11 000 0000 0010 110 // Trace registers TRCSTATR = 0x8818, // 10 001 0000 0011 000 diff --git a/llvm/test/MC/AArch64/basic-a64-diagnostics.s b/llvm/test/MC/AArch64/basic-a64-diagnostics.s index 1d7ba710a9a..bf7db132b44 100644 --- a/llvm/test/MC/AArch64/basic-a64-diagnostics.s +++ b/llvm/test/MC/AArch64/basic-a64-diagnostics.s @@ -3494,6 +3494,7 @@ msr ID_MMFR1_EL1, x12 msr ID_MMFR2_EL1, x12 msr ID_MMFR3_EL1, x12 + msr ID_MMFR4_EL1, x12 msr ID_ISAR0_EL1, x12 msr ID_ISAR1_EL1, x12 msr ID_ISAR2_EL1, x12 @@ -3587,6 +3588,9 @@ // CHECK-ERROR-NEXT: msr ID_MMFR3_EL1, x12 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected writable system register or pstate +// CHECK-ERROR-NEXT: msr ID_MMFR4_EL1, x12 +// CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: expected writable system register or pstate // CHECK-ERROR-NEXT: msr ID_ISAR0_EL1, x12 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected writable system register or pstate diff --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s index 75c86efd207..5d33a4f933b 100644 --- a/llvm/test/MC/AArch64/basic-a64-instructions.s +++ b/llvm/test/MC/AArch64/basic-a64-instructions.s @@ -4306,6 +4306,7 @@ _func: mrs x9, ID_MMFR1_EL1 mrs x9, ID_MMFR2_EL1 mrs x9, ID_MMFR3_EL1 + mrs x9, ID_MMFR4_EL1 mrs x9, ID_ISAR0_EL1 mrs x9, ID_ISAR1_EL1 mrs x9, ID_ISAR2_EL1 @@ -4606,6 +4607,7 @@ _func: // CHECK: mrs x9, {{id_mmfr1_el1|ID_MMFR1_EL1}} // encoding: [0xa9,0x01,0x38,0xd5] // CHECK: mrs x9, {{id_mmfr2_el1|ID_MMFR2_EL1}} // encoding: [0xc9,0x01,0x38,0xd5] // CHECK: mrs x9, {{id_mmfr3_el1|ID_MMFR3_EL1}} // encoding: [0xe9,0x01,0x38,0xd5] +// CHECK: mrs x9, {{id_mmfr4_el1|ID_MMFR4_EL1}} // encoding: [0xc9,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar0_el1|ID_ISAR0_EL1}} // encoding: [0x09,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar1_el1|ID_ISAR1_EL1}} // encoding: [0x29,0x02,0x38,0xd5] // CHECK: mrs x9, {{id_isar2_el1|ID_ISAR2_EL1}} // encoding: [0x49,0x02,0x38,0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt index c777f7aa649..615d9ba19ca 100644 --- a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt +++ b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt @@ -3414,6 +3414,7 @@ # CHECK: mrs x9, {{id_mmfr1_el1|ID_MMFR1_EL1}} # CHECK: mrs x9, {{id_mmfr2_el1|ID_MMFR2_EL1}} # CHECK: mrs x9, {{id_mmfr3_el1|ID_MMFR3_EL1}} +# CHECK: mrs x9, {{id_mmfr4_el1|ID_MMFR4_EL1}} # CHECK: mrs x9, {{id_isar0_el1|ID_ISAR0_EL1}} # CHECK: mrs x9, {{id_isar1_el1|ID_ISAR1_EL1}} # CHECK: mrs x9, {{id_isar2_el1|ID_ISAR2_EL1}} @@ -3968,6 +3969,7 @@ 0xa9 0x1 0x38 0xd5 0xc9 0x1 0x38 0xd5 0xe9 0x1 0x38 0xd5 +0xc9 0x2 0x38 0xd5 0x9 0x2 0x38 0xd5 0x29 0x2 0x38 0xd5 0x49 0x2 0x38 0xd5 |
