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| author | Chad Rosier <mcrosier@codeaurora.org> | 2014-06-09 01:25:51 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2014-06-09 01:25:51 +0000 |
| commit | d96e9f14ee6691236cd51a106f6a73069ee0d10e (patch) | |
| tree | d77a35300b6aa6c5b9772c0f831aec02fe88366f /llvm/test | |
| parent | 5c7b1aed5db9749f0af83320dcb2bc3d412e1821 (diff) | |
| download | bcm5719-llvm-d96e9f14ee6691236cd51a106f6a73069ee0d10e.tar.gz bcm5719-llvm-d96e9f14ee6691236cd51a106f6a73069ee0d10e.zip | |
[AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shift
plus add. The shift can be folded into the add. This only effects codegen
when the constant is 3.
llvm-svn: 210445
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-arith.ll | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-arith.ll b/llvm/test/CodeGen/AArch64/arm64-arith.ll index ed9b569e218..f36e706b15d 100644 --- a/llvm/test/CodeGen/AArch64/arm64-arith.ll +++ b/llvm/test/CodeGen/AArch64/arm64-arith.ll @@ -260,3 +260,11 @@ define i64 @f3(i64 %a) nounwind readnone ssp { %res = mul nsw i64 %a, 17 ret i64 %res } + +define i32 @f4(i32 %a) nounwind readnone ssp { +; CHECK-LABEL: f4: +; CHECK-NEXT: add w0, w0, w0, lsl #1 +; CHECK-NEXT: ret + %res = mul i32 %a, 3 + ret i32 %res +} |
