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| author | Matt Davis <Matthew.Davis@sony.com> | 2018-06-19 18:39:40 +0000 |
|---|---|---|
| committer | Matt Davis <Matthew.Davis@sony.com> | 2018-06-19 18:39:40 +0000 |
| commit | a245c765a8fe23c689e34acd29f6f8863a1da369 (patch) | |
| tree | 94c9c8994ea7cfe7cbb2cb97104ec6ae52423faf /llvm/test | |
| parent | 03aa8f3a245e5e7a3aa81617aa4637af33c2213c (diff) | |
| download | bcm5719-llvm-a245c765a8fe23c689e34acd29f6f8863a1da369.tar.gz bcm5719-llvm-a245c765a8fe23c689e34acd29f6f8863a1da369.zip | |
[MIRParser] Update a diagnostic message to use the correct register sigil. NFC
Summary:
Patch r323922 changed the sigil for physical registers to '$', instead of '%'.
An error message was missed during this change, and reports the wrong sigil.
This patch corrects that diagnostic and the tests that check that error string.
Reviewers: zer0, bjope
Reviewed By: bjope
Subscribers: bjope, thegameg, plotfi, llvm-commits
Differential Revision: https://reviews.llvm.org/D48086
llvm-svn: 335066
Diffstat (limited to 'llvm/test')
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir index 748ae76f515..6e438a792ae 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir @@ -23,7 +23,7 @@ body: | bb.0.entry: $eax = MOV32rm $rdi, 1, _, 0, _ CMP32ri8 $eax, 10, implicit-def $eflags - ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit %eflags' + ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit $eflags' JG_1 %bb.2.exit, implicit $eax bb.1.less: diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir index 90cf680f160..08ab9f5fcbc 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir @@ -23,7 +23,7 @@ body: | bb.0.entry: $eax = MOV32rm $rdi, 1, _, 0, _ CMP32ri8 $eax, 10, implicit-def $eflags - ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit %eflags' + ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit $eflags' JG_1 %bb.2.exit, implicit-def $eflags bb.1.less: diff --git a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir index 4961702bad2..f202f04db12 100644 --- a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir +++ b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir @@ -27,7 +27,7 @@ body: | $eax = MOV32rm $rdi, 1, _, 0, _ CMP32ri8 $eax, 10, implicit-def $eflags - ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit %eflags' + ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit $eflags' JG_1 %bb.2.exit bb.1.less: |
