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-rw-r--r--llvm/lib/CodeGen/MIRParser/MIParser.cpp2
-rw-r--r--llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir2
-rw-r--r--llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir2
-rw-r--r--llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir2
4 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 3532b42fa64..63e5d4d8e8c 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -929,7 +929,7 @@ bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
continue;
return error(Operands.empty() ? Token.location() : Operands.back().End,
Twine("missing implicit register operand '") +
- printImplicitRegisterFlag(I) + " %" +
+ printImplicitRegisterFlag(I) + " $" +
getRegisterName(TRI, I.getReg()) + "'");
}
return false;
diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
index 748ae76f515..6e438a792ae 100644
--- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
@@ -23,7 +23,7 @@ body: |
bb.0.entry:
$eax = MOV32rm $rdi, 1, _, 0, _
CMP32ri8 $eax, 10, implicit-def $eflags
- ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit %eflags'
+ ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit $eflags'
JG_1 %bb.2.exit, implicit $eax
bb.1.less:
diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
index 90cf680f160..08ab9f5fcbc 100644
--- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
@@ -23,7 +23,7 @@ body: |
bb.0.entry:
$eax = MOV32rm $rdi, 1, _, 0, _
CMP32ri8 $eax, 10, implicit-def $eflags
- ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit %eflags'
+ ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit $eflags'
JG_1 %bb.2.exit, implicit-def $eflags
bb.1.less:
diff --git a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
index 4961702bad2..f202f04db12 100644
--- a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
@@ -27,7 +27,7 @@ body: |
$eax = MOV32rm $rdi, 1, _, 0, _
CMP32ri8 $eax, 10, implicit-def $eflags
- ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit %eflags'
+ ; CHECK: [[@LINE+1]]:20: missing implicit register operand 'implicit $eflags'
JG_1 %bb.2.exit
bb.1.less:
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