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authorJim Grosbach <grosbach@apple.com>2011-08-11 23:51:13 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-11 23:51:13 +0000
commit8cffa28af82809e597e3455f81c45bbfd6ce7ac4 (patch)
tree6d91379e1dd1a25abdd18d00fb15f2ae043383bc /llvm/test
parent169603337350c61840b9ec449204c63efa22e034 (diff)
downloadbcm5719-llvm-8cffa28af82809e597e3455f81c45bbfd6ce7ac4.tar.gz
bcm5719-llvm-8cffa28af82809e597e3455f81c45bbfd6ce7ac4.zip
ARM vector compare to zero instruction assembly parsing support.
llvm-svn: 137389
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/ARM/neon-cmp-encoding.s7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/test/MC/ARM/neon-cmp-encoding.s b/llvm/test/MC/ARM/neon-cmp-encoding.s
index 6bfc549e947..4933e720347 100644
--- a/llvm/test/MC/ARM/neon-cmp-encoding.s
+++ b/llvm/test/MC/ARM/neon-cmp-encoding.s
@@ -1,11 +1,4 @@
@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
-@ XFAIL: *
-
-@ FIXME: We cannot currently test the following instructions, which are
-@ currently marked as for-disassembly only in the .td files:
-@ - VCEQz
-@ - VCGEz, VCLEz
-@ - VCGTz, VCLTz
@ CHECK: vceq.i8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf3]
vceq.i8 d16, d16, d17
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