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authorJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:31 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:31 +0000
commit871ec93909cca61ea80a1642401c05ed63b11ff3 (patch)
tree6b0893f1fa32e3cdb611ab54b35cb358f65572b6 /llvm/test
parenta2a63d28df2a8c53aa3d6bb9357caadf5c0ae814 (diff)
downloadbcm5719-llvm-871ec93909cca61ea80a1642401c05ed63b11ff3.tar.gz
bcm5719-llvm-871ec93909cca61ea80a1642401c05ed63b11ff3.zip
[NVPTX] Fix bug in stack code generation causes by MC conversion
We do use a very small set of physical registers, so account for them in the virtual register encoding between MachineInstr and MC llvm-svn: 187799
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/NVPTX/local-stack-frame.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/NVPTX/local-stack-frame.ll b/llvm/test/CodeGen/NVPTX/local-stack-frame.ll
new file mode 100644
index 00000000000..178dff1a5d3
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/local-stack-frame.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
+
+; Ensure we access the local stack properly
+
+; PTX32: mov.u32 %r{{[0-9]+}}, __local_depot{{[0-9]+}};
+; PTX32: cvta.local.u32 %SP, %r{{[0-9]+}};
+; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
+; PTX32: st.u32 [%SP+0], %r{{[0-9]+}};
+; PTX64: mov.u64 %rl{{[0-9]+}}, __local_depot{{[0-9]+}};
+; PTX64: cvta.local.u64 %SP, %rl{{[0-9]+}};
+; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo_param_0];
+; PTX64: st.u32 [%SP+0], %r{{[0-9]+}};
+define void @foo(i32 %a) {
+ %local = alloca i32, align 4
+ store i32 %a, i32* %local
+ ret void
+}
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