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authorJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:27 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:27 +0000
commita2a63d28df2a8c53aa3d6bb9357caadf5c0ae814 (patch)
treefd230a55c099a8dcc4f8ffe4ab439523ba5a3623 /llvm/test
parent8c6cd93123cfaa1213f88506f0bee13c0b0029bb (diff)
downloadbcm5719-llvm-a2a63d28df2a8c53aa3d6bb9357caadf5c0ae814.tar.gz
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[NVPTX] Start conversion to MC infrastructure
This change converts the NVPTX target to use the MC infrastructure instead of directly emitting MachineInstr instances. This brings the target more up-to-date with LLVM TOT, and should fix PR15175 and PR15958 (libNVPTXInstPrinter is empty) as a side-effect. llvm-svn: 187798
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/NVPTX/fp-literals.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/NVPTX/fp-literals.ll b/llvm/test/CodeGen/NVPTX/fp-literals.ll
new file mode 100644
index 00000000000..0cc2413e009
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/fp-literals.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
+
+; Make sure we can properly differentiate between single-precision and
+; double-precision FP literals.
+
+; CHECK: myaddf
+; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, 0f3F800000
+define float @myaddf(float %a) {
+ %ret = fadd float %a, 1.0
+ ret float %ret
+}
+
+; CHECK: myaddd
+; CHECK: add.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, 0d3FF0000000000000
+define double @myaddd(double %a) {
+ %ret = fadd double %a, 1.0
+ ret double %ret
+}
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