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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2015-09-15 10:05:10 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2015-09-15 10:05:10 +0000 |
| commit | 7beb737b46e03d4b2b508df9ec2da93805fb5ef8 (patch) | |
| tree | ce51ef2b9299cee65b1465cddf005d854fce0844 /llvm/test | |
| parent | e4e83a7bc17f2b8f65f253a49f2fc1b4d7252b8a (diff) | |
| download | bcm5719-llvm-7beb737b46e03d4b2b508df9ec2da93805fb5ef8.tar.gz bcm5719-llvm-7beb737b46e03d4b2b508df9ec2da93805fb5ef8.zip | |
[mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6
Differential Revision: http://reviews.llvm.org/D11632
llvm-svn: 247670
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/micromips32r6.txt | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips32r6/valid.s | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips32r6.txt b/llvm/test/MC/Disassembler/Mips/micromips32r6.txt index 9da4df60dc8..43debbe4acf 100644 --- a/llvm/test/MC/Disassembler/Mips/micromips32r6.txt +++ b/llvm/test/MC/Disassembler/Mips/micromips32r6.txt @@ -351,3 +351,7 @@ 0x25 0xe0 # CHECK: sll16 $3, $6, 8 0x25 0xe1 # CHECK: srl16 $3, $6, 8 + +0x60 0x25 0xa6 0x08 # CHECK: cachee 1, 8($5) + +0x60 0x25 0xa4 0x08 # CHECK: prefe 1, 8($5) diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s index 0b4b3fe3e41..14f11427d59 100644 --- a/llvm/test/MC/Mips/micromips32r6/valid.s +++ b/llvm/test/MC/Mips/micromips32r6/valid.s @@ -179,4 +179,6 @@ or16 $3, $7 # CHECK: or16 $3, $7 # encoding: [0x45,0xf9] sll16 $3, $6, 8 # CHECK: sll16 $3, $6, 8 # encoding: [0x25,0xe0] srl16 $3, $6, 8 # CHECK: srl16 $3, $6, 8 # encoding: [0x25,0xe1] + prefe 1, 8($5) # CHECK: prefe 1, 8($5) # encoding: [0x60,0x25,0xa4,0x08] + cachee 1, 8($5) # CHECK: cachee 1, 8($5) # encoding: [0x60,0x25,0xa6,0x08] |
