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authorJack Carter <jack.carter@imgtec.com>2013-03-28 23:45:13 +0000
committerJack Carter <jack.carter@imgtec.com>2013-03-28 23:45:13 +0000
commit311246c6d51a99439172ddf2cea28be4f53df4dd (patch)
tree4abd935dfdb8c6df6973396388dc1323ed354505 /llvm/test
parent3faf47c46225b0f56c14235550d363ae90f4f1c6 (diff)
downloadbcm5719-llvm-311246c6d51a99439172ddf2cea28be4f53df4dd.tar.gz
bcm5719-llvm-311246c6d51a99439172ddf2cea28be4f53df4dd.zip
[Mips Assembler] Add support for OR macro with imediate opperand
Mips assembler supports macros that allows the OR instruction to have an immediate parameter. This patch adds an instruction alias that converts this macro into a Mips ORI instruction. Contributer: Vladimir Medic llvm-svn: 178316
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Mips/mips-alu-instructions.s2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/mips-alu-instructions.s b/llvm/test/MC/Mips/mips-alu-instructions.s
index 816138ec654..7384d19e440 100644
--- a/llvm/test/MC/Mips/mips-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips-alu-instructions.s
@@ -13,6 +13,7 @@
# CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d]
# CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00]
# CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00]
+# CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34]
# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34]
# CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
# CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
@@ -40,6 +41,7 @@
ins $19, $9, 6,7
nor $9, $6, $7
or $3, $3, $5
+ or $4, $5, 17767
ori $9, $6, 17767
rotr $9, $6, 7
rotrv $9, $6, $7
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