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| author | Craig Topper <craig.topper@intel.com> | 2017-10-04 17:20:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-10-04 17:20:12 +0000 |
| commit | 6fb55716e9c77e716f4ac25abc84687eac29f848 (patch) | |
| tree | 07097be59b5b39b860012ae8d20d8248fb9a6506 /llvm/test/tools/llvm-objcopy/segment-shift.test | |
| parent | 5a09996ff70ee0cd533c8d401f3924aee662551f (diff) | |
| download | bcm5719-llvm-6fb55716e9c77e716f4ac25abc84687eac29f848.tar.gz bcm5719-llvm-6fb55716e9c77e716f4ac25abc84687eac29f848.zip | |
[X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input instead of FR32/FR64
This patch redefines the MOVSS/MOVSD instructions to take VR128 as its second input. This allows the MOVSS/SD->BLEND commute to work without requiring a COPY to be inserted.
This should fix PR33079
Overall this looks to be an improvement in the generated code. I haven't checked the EXPENSIVE_CHECKS build but I'll do that and update with results.
Differential Revision: https://reviews.llvm.org/D38449
llvm-svn: 314914
Diffstat (limited to 'llvm/test/tools/llvm-objcopy/segment-shift.test')
0 files changed, 0 insertions, 0 deletions
