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| author | Evandro Menezes <e.menezes@samsung.com> | 2019-01-08 22:29:56 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2019-01-08 22:29:56 +0000 |
| commit | 9b7b5b1dcc5ed584068f4c9ef1f130f73478d809 (patch) | |
| tree | 97fa1041c4176adc07d238a47e74c88c4675f6c4 /llvm/test/tools/llvm-mca | |
| parent | 5d780093fd6e0776a24d8203d2675a783d57f7e5 (diff) | |
| download | bcm5719-llvm-9b7b5b1dcc5ed584068f4c9ef1f130f73478d809.tar.gz bcm5719-llvm-9b7b5b1dcc5ed584068f4c9ef1f130f73478d809.zip | |
[llvm-mca] Update the Exynos test cases (NFC)
Add more entropy to the test cases.
llvm-svn: 350662
Diffstat (limited to 'llvm/test/tools/llvm-mca')
| -rw-r--r-- | llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s b/llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s index a7ff007129f..fd6f4dd80e3 100644 --- a/llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s +++ b/llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s @@ -2,14 +2,14 @@ # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM1 # RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3 - add w0, w1, w2, lsl #0 + adds w0, w1, w2, lsl #0 sub x3, x4, x5, lsr #1 - adds x6, x7, x8, lsl #2 - subs w9, w10, w11, asr #3 - add w12, w13, w14, lsl #4 + ands x6, x7, x8, lsl #2 + orr w9, w10, w11, asr #3 + adds w12, w13, w14, lsl #4 sub x15, x16, x17, lsr #6 - adds x18, x19, x20, lsl #8 - subs w21, w22, w23, asr #10 + ands x18, x19, x20, lsl #8 + orr w21, w22, w23, asr #10 # ALL: Iterations: 100 # ALL-NEXT: Instructions: 800 @@ -39,20 +39,20 @@ # ALL: [1] [2] [3] [4] [5] [6] Instructions: -# EM1-NEXT: 1 1 0.33 add w0, w1, w2 +# EM1-NEXT: 1 1 0.33 adds w0, w1, w2 # EM1-NEXT: 1 2 0.67 sub x3, x4, x5, lsr #1 -# EM1-NEXT: 1 1 0.33 adds x6, x7, x8, lsl #2 -# EM1-NEXT: 1 2 0.67 subs w9, w10, w11, asr #3 -# EM1-NEXT: 1 2 0.67 add w12, w13, w14, lsl #4 +# EM1-NEXT: 1 1 0.33 ands x6, x7, x8, lsl #2 +# EM1-NEXT: 1 2 0.67 orr w9, w10, w11, asr #3 +# EM1-NEXT: 1 2 0.67 adds w12, w13, w14, lsl #4 # EM1-NEXT: 1 2 0.67 sub x15, x16, x17, lsr #6 -# EM1-NEXT: 1 2 0.67 adds x18, x19, x20, lsl #8 -# EM1-NEXT: 1 2 0.67 subs w21, w22, w23, asr #10 +# EM1-NEXT: 1 2 0.67 ands x18, x19, x20, lsl #8 +# EM1-NEXT: 1 2 0.67 orr w21, w22, w23, asr #10 -# EM3-NEXT: 1 1 0.25 add w0, w1, w2 +# EM3-NEXT: 1 1 0.25 adds w0, w1, w2 # EM3-NEXT: 1 2 0.50 sub x3, x4, x5, lsr #1 -# EM3-NEXT: 1 1 0.25 adds x6, x7, x8, lsl #2 -# EM3-NEXT: 1 2 0.50 subs w9, w10, w11, asr #3 -# EM3-NEXT: 1 2 0.50 add w12, w13, w14, lsl #4 +# EM3-NEXT: 1 1 0.25 ands x6, x7, x8, lsl #2 +# EM3-NEXT: 1 2 0.50 orr w9, w10, w11, asr #3 +# EM3-NEXT: 1 2 0.50 adds w12, w13, w14, lsl #4 # EM3-NEXT: 1 2 0.50 sub x15, x16, x17, lsr #6 -# EM3-NEXT: 1 2 0.50 adds x18, x19, x20, lsl #8 -# EM3-NEXT: 1 2 0.50 subs w21, w22, w23, asr #10 +# EM3-NEXT: 1 2 0.50 ands x18, x19, x20, lsl #8 +# EM3-NEXT: 1 2 0.50 orr w21, w22, w23, asr #10 |
