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| author | Sanjay Patel <spatel@rotateright.com> | 2016-04-11 17:58:37 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-04-11 17:58:37 +0000 |
| commit | 1dd212f9007c2dace2bea6dfd4545904b8af0e1a (patch) | |
| tree | 071f76911f2d6938a63dfeb44d8e45b2a23303cf /llvm/test/Transforms/InstCombine/shift-shift.ll | |
| parent | c8753cb07450461d29f546016a2fe14641d88c0a (diff) | |
| download | bcm5719-llvm-1dd212f9007c2dace2bea6dfd4545904b8af0e1a.tar.gz bcm5719-llvm-1dd212f9007c2dace2bea6dfd4545904b8af0e1a.zip | |
[InstCombine] consolidate tests for related bugs
llvm-svn: 265973
Diffstat (limited to 'llvm/test/Transforms/InstCombine/shift-shift.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shift-shift.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift-shift.ll b/llvm/test/Transforms/InstCombine/shift-shift.ll index 2968a9bf3c6..6aa262fd931 100644 --- a/llvm/test/Transforms/InstCombine/shift-shift.ll +++ b/llvm/test/Transforms/InstCombine/shift-shift.ll @@ -41,3 +41,35 @@ loop: br label %loop } +; Converting the 2 shifts to SHL 6 without the AND is wrong. +; https://llvm.org/bugs/show_bug.cgi?id=8547 + +define i32 @pr8547(i32* %g) { +; CHECK-LABEL: @pr8547( +; CHECK-NEXT: codeRepl: +; CHECK-NEXT: br label %for.cond +; CHECK: for.cond: +; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ] +; CHECK-NEXT: store i32 [[STOREMERGE]], i32* %g, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i32 [[STOREMERGE]], 6 +; CHECK-NEXT: [[CONV2:%.*]] = and i32 [[TMP0]], 64 +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[CONV2]], 0 +; CHECK-NEXT: br i1 [[TOBOOL]], label %for.cond, label %codeRepl2 +; CHECK: codeRepl2: +; CHECK-NEXT: ret i32 [[CONV2]] +; +codeRepl: + br label %for.cond + +for.cond: + %storemerge = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ] + store i32 %storemerge, i32* %g, align 4 + %shl = shl i32 %storemerge, 30 + %conv2 = lshr i32 %shl, 24 + %tobool = icmp eq i32 %conv2, 0 + br i1 %tobool, label %for.cond, label %codeRepl2 + +codeRepl2: + ret i32 %conv2 +} + |
