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| author | Oliver Stannard <oliver.stannard@arm.com> | 2018-09-27 13:47:40 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2018-09-27 13:47:40 +0000 |
| commit | 224428c06a24303b2200aa98d719f080570fcb9f (patch) | |
| tree | 25c0c4961fc15264a0047b3832c0956337f57404 /llvm/test/MC | |
| parent | 382c935c4231eaf7b820cb207c9fbd0c50505181 (diff) | |
| download | bcm5719-llvm-224428c06a24303b2200aa98d719f080570fcb9f.tar.gz bcm5719-llvm-224428c06a24303b2200aa98d719f080570fcb9f.zip | |
[AArch64][v8.5A] Add prediction invalidation instructions to AArch64
This adds new system instructions which act as barriers to speculative
execution based on earlier execution within a particular execution
context.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52479
llvm-svn: 343214
Diffstat (limited to 'llvm/test/MC')
| -rw-r--r-- | llvm/test/MC/AArch64/armv8.5a-predctrl-error.s | 20 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/armv8.5a-predctrl.s | 18 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt | 15 |
3 files changed, 53 insertions, 0 deletions
diff --git a/llvm/test/MC/AArch64/armv8.5a-predctrl-error.s b/llvm/test/MC/AArch64/armv8.5a-predctrl-error.s new file mode 100644 index 00000000000..0fd49b02bee --- /dev/null +++ b/llvm/test/MC/AArch64/armv8.5a-predctrl-error.s @@ -0,0 +1,20 @@ +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s 2>&1| FileCheck %s + +cfp rctx +dvp rctx +cpp rctx + +// CHECK: specified cfp op requires a register +// CHECK: specified dvp op requires a register +// CHECK: specified cpp op requires a register + +cfp x0, x1 +dvp x1, x2 +cpp x2, x3 + +// CHECK: invalid operand for prediction restriction instruction +// CHECK-NEXT: cfp +// CHECK: invalid operand for prediction restriction instruction +// CHECK-NEXT: dvp +// CHECK: invalid operand for prediction restriction instruction +// CHECK-NEXT: cpp diff --git a/llvm/test/MC/AArch64/armv8.5a-predctrl.s b/llvm/test/MC/AArch64/armv8.5a-predctrl.s new file mode 100644 index 00000000000..af7dda76862 --- /dev/null +++ b/llvm/test/MC/AArch64/armv8.5a-predctrl.s @@ -0,0 +1,18 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predctrl < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predctrl < %s 2>&1 | FileCheck %s --check-prefix=NOPREDCTRL + +cfp rctx, x0 +dvp rctx, x1 +cpp rctx, x2 + +// CHECK: cfp rctx, x0 // encoding: [0x80,0x73,0x0b,0xd5] +// CHECK: dvp rctx, x1 // encoding: [0xa1,0x73,0x0b,0xd5] +// CHECK: cpp rctx, x2 // encoding: [0xe2,0x73,0x0b,0xd5] + +// NOPREDCTRL: CFPRCTX requires predctrl +// NOPREDCTRL-NEXT: cfp +// NOPREDCTRL: DVPRCTX requires predctrl +// NOPREDCTRL-NEXT: dvp +// NOPREDCTRL: CPPRCTX requires predctrl +// NOPREDCTRL-NEXT: cpp diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt b/llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt new file mode 100644 index 00000000000..ecfdeec86f1 --- /dev/null +++ b/llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt @@ -0,0 +1,15 @@ +# RUN: llvm-mc -triple=aarch64 -mattr=+predctrl -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=-predctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB + +[0x80 0x73 0x0b 0xd5] +[0xa1 0x73 0x0b 0xd5] +[0xe2 0x73 0x0b 0xd5] + +# CHECK: cfp rctx, x0 +# CHECK: dvp rctx, x1 +# CHECK: cpp rctx, x2 + +# NOSB: sys #3, c7, c3, #4, x0 +# NOSB: sys #3, c7, c3, #5, x1 +# NOSB: sys #3, c7, c3, #7, x2 |
