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| author | Tim Northover <Tim.Northover@arm.com> | 2013-02-14 16:22:14 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-14 16:22:14 +0000 |
| commit | d21ddb90427959d3b4a63049d89cbcda6ef5f6d4 (patch) | |
| tree | 08013fa685cd46f6618e6a07d70fece4b2303099 /llvm/test/MC/X86/intel-syntax-binary.s | |
| parent | f471c3e63a436b24d30a593d97ab551a68f2622f (diff) | |
| download | bcm5719-llvm-d21ddb90427959d3b4a63049d89cbcda6ef5f6d4.tar.gz bcm5719-llvm-d21ddb90427959d3b4a63049d89cbcda6ef5f6d4.zip | |
AArch64: stop claiming that NEON registers are usable for now.
If vector types have legal register classes, then LLVM bypasses LegalizeTypes
on them, which causes faults currently since the code to handle them isn't in
place.
This fixes test failures when AArch64 is the default target.
llvm-svn: 175172
Diffstat (limited to 'llvm/test/MC/X86/intel-syntax-binary.s')
0 files changed, 0 insertions, 0 deletions
