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| author | Shiva Chen <shiva0217@gmail.com> | 2019-01-30 11:16:59 +0000 |
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2019-01-30 11:16:59 +0000 |
| commit | 5af037f1e9635821bf9a5792d29d9ca43862d891 (patch) | |
| tree | b127af9bc7e56210c8306692694494511cb6a36e /llvm/test/MC/RISCV | |
| parent | d17f6ab61b2492cdf5c1c88c36915456206f84fe (diff) | |
| download | bcm5719-llvm-5af037f1e9635821bf9a5792d29d9ca43862d891.tar.gz bcm5719-llvm-5af037f1e9635821bf9a5792d29d9ca43862d891.zip | |
[RISCV] Insert R_RISCV_ALIGN relocation type and Nops for code alignment when linker relaxation enabled
Linker relaxation may change code size. We need to fix up the alignment
of alignment directive in text section by inserting Nops and R_RISCV_ALIGN
relocation type. So then linker could satisfy the alignment by removing Nops.
To do this:
1. Add shouldInsertExtraNopBytesForCodeAlign target hook to calculate
the Nops we need to insert.
2. Add shouldInsertFixupForCodeAlign target hook to insert
R_RISCV_ALIGN fixup type.
Differential Revision: https://reviews.llvm.org/D47755
llvm-svn: 352616
Diffstat (limited to 'llvm/test/MC/RISCV')
| -rw-r--r-- | llvm/test/MC/RISCV/align.s | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s new file mode 100644 index 00000000000..e62af931555 --- /dev/null +++ b/llvm/test/MC/RISCV/align.s @@ -0,0 +1,105 @@ +# The file testing Nop insertion with R_RISCV_ALIGN for relaxation. + +# Relaxation enabled: +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \ +# RUN: | llvm-objdump -d -riscv-no-aliases - \ +# RUN: | FileCheck -check-prefix=RELAX-INST %s +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \ +# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s + +# Relaxation disabled: +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \ +# RUN: | llvm-objdump -d -riscv-no-aliases - \ +# RUN: | FileCheck -check-prefix=NORELAX-INST %s +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \ +# RUN: | llvm-readobj -r | FileCheck -check-prefix=NORELAX-RELOC %s + +# Relaxation enabled with C extension: +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \ +# RUN: | llvm-objdump -d -riscv-no-aliases - \ +# RUN: | FileCheck -check-prefix=C-EXT-RELAX-INST %s +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \ +# RUN: | llvm-readobj -r | FileCheck -check-prefix=C-EXT-RELAX-RELOC %s + +# Relaxation disabled with C extension: +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \ +# RUN: | llvm-objdump -d -riscv-no-aliases - \ +# RUN: | FileCheck -check-prefix=C-EXT-NORELAX-INST %s +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \ +# RUN: | llvm-readobj -r | FileCheck -check-prefix=C-EXT-NORELAX-RELOC %s + +# We need to insert N-MinNopSize bytes NOPs and R_RISCV_ALIGN relocation +# type for .align N directive when linker relaxation enabled. +# Linker could satisfy alignment by removing NOPs after linker relaxation. + +# The first R_RISCV_ALIGN come from +# MCELFStreamer::InitSections() EmitCodeAlignment(4). +# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2 +# C-EXT-RELAX-INST: c.nop +test: + .p2align 2 +# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2 +# C-EXT-RELAX-INST: c.nop + bne zero, a0, .LBB0_2 + mv a0, zero + .p2align 3 +# RELAX-RELOC: R_RISCV_ALIGN - 0x4 +# RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6 +# C-EXT-RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-INST: c.nop +# C-EXT-NORELAX-INST: addi zero, zero, 0 + add a0, a0, a1 + .align 4 +.LBB0_2: +# RELAX-RELOC: R_RISCV_ALIGN - 0xC +# RELAX-INST: addi zero, zero, 0 +# RELAX-INST: addi zero, zero, 0 +# RELAX-INST: addi zero, zero, 0 +# NORELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0xE +# C-EXT-RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-INST: c.nop +# C-EXT-INST: addi zero, zero, 0 +# C-EXT-INST: c.nop + add a0, a0, a1 + .p2align 3 +.constant_pool: +.long 3126770193 +# RELAX-RELOC: R_RISCV_ALIGN - 0x4 +# RELAX-INST: addi zero, zero, 0 +# NORELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6 +# C-EXT-RELAX-INST: addi zero, zero, 0 +# C-EXT-RELAX-INST: c.nop +# C-EXT-INST: addi zero, zero, 0 +# C-EXT-INST: c.nop + add a0, a0, a1 +# Alignment directive with specific padding value 0x01. +# We will not emit R_RISCV_ALIGN in this case. +# The behavior is the same as GNU assembler. + .p2align 4, 1 +# RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xC +# RELAX-INST: 01 01 +# RELAX-INST: 01 01 +# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xE +# C-EXT-RELAX-INST: 01 01 +# C-EXT-INST: 01 01 + ret +# NORELAX-RELOC-NOT: R_RISCV +# C-EXT-NORELAX-RELOC-NOT: R_RISCV +# We only need to insert R_RISCV_ALIGN for code section +# when the linker relaxation enabled. + .data + .p2align 3 +# RELAX-RELOC-NOT: R_RISCV_ALIGN +# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN +data1: + .word 7 + .p2align 4 +# RELAX-RELOC-NOT: R_RISCV_ALIGN +# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN +data2: + .word 9 |
