summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/RISCV
diff options
context:
space:
mode:
authorAna Pazos <apazos@codeaurora.org>2018-08-09 20:51:53 +0000
committerAna Pazos <apazos@codeaurora.org>2018-08-09 20:51:53 +0000
commit10de234905ea9dd310cb3047c7b9aa6c460c5653 (patch)
tree60d3b609304482abae80224092a630cc09f4d6fd /llvm/test/MC/RISCV
parent03406c50faa9d8f8a731551318644db2831bfa01 (diff)
downloadbcm5719-llvm-10de234905ea9dd310cb3047c7b9aa6c460c5653.tar.gz
bcm5719-llvm-10de234905ea9dd310cb3047c7b9aa6c460c5653.zip
[RISC-V] Fixed alias for addi x2, x2, 0
A missing check for non-zero immediate in MCOperandPredicate caused c.addi16sp sp, 0 to be selected which is not a valid instruction. llvm-svn: 339381
Diffstat (limited to 'llvm/test/MC/RISCV')
-rw-r--r--llvm/test/MC/RISCV/rv32c-aliases-valid.s3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/test/MC/RISCV/rv32c-aliases-valid.s b/llvm/test/MC/RISCV/rv32c-aliases-valid.s
index b743b3fff5f..f9c07e23a84 100644
--- a/llvm/test/MC/RISCV/rv32c-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rv32c-aliases-valid.s
@@ -60,3 +60,6 @@ li x12, -0x80000000
li x12, 0x80000000
# CHECK-EXPAND: c.li a2, -1
li x12, 0xFFFFFFFF
+
+# CHECK-EXPAND: c.mv sp, sp
+addi x2, x2, 0
OpenPOWER on IntegriCloud