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authorVladimir Medic <Vladimir.Medic@imgtec.com>2014-08-15 09:29:30 +0000
committerVladimir Medic <Vladimir.Medic@imgtec.com>2014-08-15 09:29:30 +0000
commit8d380fa37aa2ac85649975a7009095f59b4701c0 (patch)
tree657d9323cb83ece9b53b5718e7506242dbddb03e /llvm/test/MC/Mips/mips4
parent70cf4c626e25298c570d951f441522fb0d9e1783 (diff)
downloadbcm5719-llvm-8d380fa37aa2ac85649975a7009095f59b4701c0.tar.gz
bcm5719-llvm-8d380fa37aa2ac85649975a7009095f59b4701c0.zip
Current implementation of c.cond.fmt instructions only accept default cc0 register. This patch enables the instruction to accept other fcc registers. The aliases with default fcc0 registers are also defined.
llvm-svn: 215698
Diffstat (limited to 'llvm/test/MC/Mips/mips4')
-rw-r--r--llvm/test/MC/Mips/mips4/valid-xfail.s28
-rw-r--r--llvm/test/MC/Mips/mips4/valid.s28
2 files changed, 28 insertions, 28 deletions
diff --git a/llvm/test/MC/Mips/mips4/valid-xfail.s b/llvm/test/MC/Mips/mips4/valid-xfail.s
index ff6f457ca83..1dcf276457e 100644
--- a/llvm/test/MC/Mips/mips4/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips4/valid-xfail.s
@@ -7,34 +7,6 @@
# XFAIL: *
.set noat
- c.eq.d $fcc1,$f15,$f15
- c.eq.s $fcc5,$f24,$f17
- c.f.d $fcc4,$f11,$f21
- c.f.s $fcc4,$f30,$f7
- c.le.d $fcc4,$f18,$f1
- c.le.s $fcc6,$f24,$f4
- c.lt.d $fcc3,$f9,$f3
- c.lt.s $fcc2,$f17,$f14
- c.nge.d $fcc5,$f21,$f16
- c.nge.s $fcc3,$f11,$f8
- c.ngl.s $fcc2,$f31,$f23
- c.ngle.s $fcc2,$f18,$f23
- c.ngt.d $fcc4,$f24,$f7
- c.ngt.s $fcc5,$f8,$f13
- c.ole.d $fcc2,$f16,$f31
- c.ole.s $fcc3,$f7,$f20
- c.olt.d $fcc4,$f19,$f28
- c.olt.s $fcc6,$f20,$f7
- c.seq.d $fcc4,$f31,$f7
- c.seq.s $fcc7,$f1,$f25
- c.ueq.d $fcc4,$f13,$f25
- c.ueq.s $fcc6,$f3,$f30
- c.ule.d $fcc7,$f25,$f18
- c.ule.s $fcc7,$f21,$f30
- c.ult.d $fcc6,$f6,$f17
- c.ult.s $fcc7,$f24,$f10
- c.un.d $fcc6,$f23,$f24
- c.un.s $fcc1,$f30,$f4
madd.d $f18,$f19,$f26,$f20
madd.s $f1,$f31,$f19,$f25
msub.d $f10,$f1,$f31,$f18
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index 949b91da922..6bd294ef2fd 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -28,6 +28,34 @@
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
+ c.eq.d $fcc1,$f15,$f15
+ c.eq.s $fcc5,$f24,$f17
+ c.f.d $fcc4,$f11,$f21
+ c.f.s $fcc4,$f30,$f7
+ c.le.d $fcc4,$f18,$f1
+ c.le.s $fcc6,$f24,$f4
+ c.lt.d $fcc3,$f9,$f3
+ c.lt.s $fcc2,$f17,$f14
+ c.nge.d $fcc5,$f21,$f16
+ c.nge.s $fcc3,$f11,$f8
+ c.ngl.s $fcc2,$f31,$f23
+ c.ngle.s $fcc2,$f18,$f23
+ c.ngt.d $fcc4,$f24,$f7
+ c.ngt.s $fcc5,$f8,$f13
+ c.ole.d $fcc2,$f16,$f31
+ c.ole.s $fcc3,$f7,$f20
+ c.olt.d $fcc4,$f19,$f28
+ c.olt.s $fcc6,$f20,$f7
+ c.seq.d $fcc4,$f31,$f7
+ c.seq.s $fcc7,$f1,$f25
+ c.ueq.d $fcc4,$f13,$f25
+ c.ueq.s $fcc6,$f3,$f30
+ c.ule.d $fcc7,$f25,$f18
+ c.ule.s $fcc7,$f21,$f30
+ c.ult.d $fcc6,$f6,$f17
+ c.ult.s $fcc7,$f24,$f10
+ c.un.d $fcc6,$f23,$f24
+ c.un.s $fcc1,$f30,$f4
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
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