Current implementation of c.cond.fmt instructions only accept default cc0 register. This patch enables the instruction to accept other fcc registers. The aliases with default fcc0 registers are also defined.

llvm-svn: 215698

14 files changed, 234 insertions, 197 deletions

diff --git a/llvm/lib/Target/Mips/MipsInstrFPU.td b/llvm/lib/Target/Mips/MipsInstrFPU.td
index 29d8e30be48..0882e07b85f 100644
--- a/llvm/lib/Target/Mips/MipsInstrFPU.td
+++ b/llvm/lib/Target/Mips/MipsInstrFPU.td
@@ -232,14 +232,14 @@ class CEQS_FT<string typestr, RegisterClass RC, InstrItinClass Itin,
   let isCodeGenOnly = 1;
 }
 
-class C_COND_FT<string CondStr, string Typestr, RegisterOperand RC,
-                InstrItinClass itin>  :
-   InstSE<(outs), (ins RC:$fs, RC:$ft),
-          !strconcat("c.", CondStr, ".", Typestr, "\t$fs, $ft"), [], itin,
-          FrmFR>;
-
-multiclass C_COND_M<string TypeStr, RegisterOperand RC, bits<5> fmt,
-                    InstrItinClass itin> {
+class C_COND_FT<string CondStr, string Typestr,
+                RegisterOperand RC, InstrItinClass itin>  :
+   InstSE<(outs), (ins FCCRegsOpnd:$cc, RC:$fs, RC:$ft),
+          !strconcat("c.", CondStr, ".", Typestr, "\t $cc, $fs, $ft"),
+          [], itin, FrmFR>;
+
+multiclass C_COND_M<string TypeStr, RegisterOperand RC,
+                    bits<5> fmt, InstrItinClass itin> {
   def C_F_#NAME : C_COND_FT<"f", TypeStr, RC, itin>, C_COND_FM<fmt, 0>;
   def C_UN_#NAME : C_COND_FT<"un", TypeStr, RC, itin>, C_COND_FM<fmt, 1>;
   def C_EQ_#NAME : C_COND_FT<"eq", TypeStr, RC, itin>, C_COND_FM<fmt, 2>;
@@ -258,12 +258,48 @@ multiclass C_COND_M<string TypeStr, RegisterOperand RC, bits<5> fmt,
   def C_NGT_#NAME : C_COND_FT<"ngt", TypeStr, RC, itin>, C_COND_FM<fmt, 15>;
 }
 
-defm S : C_COND_M<"s", FGR32Opnd, 16, II_C_CC_S>, ISA_MIPS1_NOT_32R6_64R6;
-defm D32 : C_COND_M<"d", AFGR64Opnd, 17, II_C_CC_D>, ISA_MIPS1_NOT_32R6_64R6,
-           AdditionalRequires<[NotFP64bit]>;
+
+defm S : C_COND_M<"s", FGR32Opnd, 16, II_C_CC_S>,
+         INSN_MIPS4_32_NOT_32R6_64R6;
+defm D32 : C_COND_M<"d", AFGR64Opnd, 17, II_C_CC_D>,
+           INSN_MIPS4_32_NOT_32R6_64R6, AdditionalRequires<[NotFP64bit]>;
 let DecoderNamespace = "Mips64" in
-defm D64 : C_COND_M<"d", FGR64Opnd, 17, II_C_CC_D>, ISA_MIPS1_NOT_32R6_64R6,
-           AdditionalRequires<[IsFP64bit]>;
+defm D64 : C_COND_M<"d", FGR64Opnd, 17, II_C_CC_D>,
+           INSN_MIPS4_32_NOT_32R6_64R6, AdditionalRequires<[IsFP64bit]>;
+
+class CCInstAlias<string CondStr, string TypeStr, dag Result>:
+       MipsInstAlias<!strconcat("c.", CondStr, ".", TypeStr, "\t $fs, $ft"),
+                     Result>, ISA_MIPS1_NOT_32R6_64R6;
+
+multiclass CCondInstAlias<string CondStr,
+                           Instruction CondS, Instruction CondD32,
+                           Instruction CondD64> {
+  def : CCInstAlias<CondStr, "s",
+                   (CondS FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft )>;
+  def : CCInstAlias<CondStr, "d" ,
+                   (CondD32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft )>,
+                    AdditionalRequires<[NotFP64bit]>;
+  def : CCInstAlias<CondStr, "d",
+                   (CondD64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft )>,
+                    AdditionalRequires<[IsFP64bit]>;
+}
+
+defm : CCondInstAlias<"f", C_F_S, C_F_D32, C_F_D64>;
+defm : CCondInstAlias<"un", C_UN_S, C_UN_D32, C_UN_D64>;
+defm : CCondInstAlias<"eq", C_EQ_S, C_EQ_D32, C_EQ_D64>;
+defm : CCondInstAlias<"ueq", C_UEQ_S, C_UEQ_D32, C_UEQ_D64>;
+defm : CCondInstAlias<"olt", C_OLT_S, C_OLT_D32, C_OLT_D64>;
+defm : CCondInstAlias<"ult", C_ULT_S, C_ULT_D32, C_ULT_D64>;
+defm : CCondInstAlias<"ole", C_OLE_S, C_OLE_D32, C_OLE_D64>;
+defm : CCondInstAlias<"ule", C_ULE_S, C_ULE_D32, C_ULE_D64>;
+defm : CCondInstAlias<"sf", C_SF_S, C_SF_D32, C_SF_D64>;
+defm : CCondInstAlias<"ngle", C_NGLE_S, C_NGLE_D32, C_NGLE_D64>;
+defm : CCondInstAlias<"seq", C_SEQ_S, C_SEQ_D32, C_SEQ_D64>;
+defm : CCondInstAlias<"ngl", C_NGL_S, C_NGL_D32, C_NGL_D64>;
+defm : CCondInstAlias<"lt", C_LT_S, C_LT_D32, C_LT_D64>;
+defm : CCondInstAlias<"nge", C_NGE_S, C_NGE_D32, C_NGE_D64>;
+defm : CCondInstAlias<"le", C_LE_S, C_LE_D32, C_LE_D64>;
+defm : CCondInstAlias<"ngt", C_NGT_S, C_NGT_D32, C_NGT_D64>;
 
 //===----------------------------------------------------------------------===//
 // Floating Point Instructions
diff --git a/llvm/lib/Target/Mips/MipsInstrFormats.td b/llvm/lib/Target/Mips/MipsInstrFormats.td
index 6a01ae560f3..1c1915a1ba8 100644
--- a/llvm/lib/Target/Mips/MipsInstrFormats.td
+++ b/llvm/lib/Target/Mips/MipsInstrFormats.td
@@ -768,6 +768,7 @@ class CEQS_FM<bits<5> fmt> : StdArch {
   bits<5> fs;
   bits<5> ft;
   bits<4> cond;
+  bits<3> cc;
 
   bits<32> Inst;
 
@@ -775,7 +776,7 @@ class CEQS_FM<bits<5> fmt> : StdArch {
   let Inst{25-21} = fmt;
   let Inst{20-16} = ft;
   let Inst{15-11} = fs;
-  let Inst{10-8} = 0; // cc
+  let Inst{10-8} = cc;
   let Inst{7-4} = 0x3;
   let Inst{3-0} = cond;
 }
diff --git a/llvm/test/MC/Mips/mips32/valid-xfail.s b/llvm/test/MC/Mips/mips32/valid-xfail.s
index d680740babf..e434231a0ba 100644
--- a/llvm/test/MC/Mips/mips32/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips32/valid-xfail.s
@@ -7,32 +7,4 @@
 # XFAIL: *
 
         .set noat
-        c.eq.d          $fcc1,$f15,$f15
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
-        c.nge.s         $fcc3,$f11,$f8
-        c.ngl.s         $fcc2,$f31,$f23
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
-        c.seq.s         $fcc7,$f1,$f25
-        c.ueq.d         $fcc4,$f13,$f25
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
-        c.un.s          $fcc1,$f30,$f4
         rorv            $13,$a3,$s5
diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s
index d330905ae29..5a94a30130e 100644
--- a/llvm/test/MC/Mips/mips32/valid.s
+++ b/llvm/test/MC/Mips/mips32/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.w.d  $f11,$f25
         ceil.w.s  $f6,$f20
         cfc1      $s1,$21
diff --git a/llvm/test/MC/Mips/mips32r2/valid-xfail.s b/llvm/test/MC/Mips/mips32r2/valid-xfail.s
index ef02d51b53f..c928f2c5307 100644
--- a/llvm/test/MC/Mips/mips32r2/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips32r2/valid-xfail.s
@@ -33,50 +33,22 @@
         bmnz.v          $w15,$w2,$w28
         bmz.v           $w13,$w11,$w21
         bsel.v          $w28,$w7,$w0
-        c.eq.d          $fcc1,$f15,$f15
-        c.eq.ps         $fcc5,$f0,$f9
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
-        c.f.ps          $fcc6,$f11,$f11
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
-        c.le.ps         $fcc1,$f7,$f20
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
-        c.lt.ps         $f19,$f5
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
-        c.nge.ps        $f1,$f26
-        c.nge.s         $fcc3,$f11,$f8
-        c.ngl.ps        $f21,$f30
-        c.ngl.s         $fcc2,$f31,$f23
-        c.ngle.ps       $fcc7,$f12,$f20
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
-        c.ngt.ps        $fcc5,$f30,$f6
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
-        c.ole.ps        $fcc7,$f21,$f8
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
-        c.olt.ps        $fcc3,$f7,$f16
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
-        c.seq.ps        $fcc6,$f31,$f14
-        c.seq.s         $fcc7,$f1,$f25
-        c.sf.ps         $fcc6,$f4,$f6
-        c.ueq.d         $fcc4,$f13,$f25
-        c.ueq.ps        $fcc1,$f5,$f29
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
-        c.ule.ps        $fcc6,$f17,$f3
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
-        c.ult.ps        $fcc7,$f14,$f0
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
         c.un.ps         $fcc4,$f2,$f26
-        c.un.s          $fcc1,$f30,$f4
+        c.ult.ps        $fcc7,$f14,$f0
+        c.ule.ps        $fcc6,$f17,$f3
+        c.ueq.ps        $fcc1,$f5,$f29
+        c.sf.ps         $fcc6,$f4,$f6
+        c.seq.ps        $fcc6,$f31,$f14
+        c.olt.ps        $fcc3,$f7,$f16
+        c.ole.ps        $fcc7,$f21,$f8
+        c.ngt.ps        $fcc5,$f30,$f6
+        c.ngle.ps       $fcc7,$f12,$f20
+        c.ngl.ps        $f21,$f30
+        c.nge.ps        $f1,$f26
+        c.lt.ps         $f19,$f5
+        c.le.ps         $fcc1,$f7,$f20
+        c.f.ps          $fcc6,$f11,$f11
+        c.eq.ps         $fcc5,$f0,$f9
         ceil.l.d        $f1,$f3
         ceil.l.s        $f18,$f13
         cfcmsa          $s6,$19
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 631c691ed71..ec708c804b5 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.w.d  $f11,$f25
         ceil.w.s  $f6,$f20
         cfc1      $s1,$21
diff --git a/llvm/test/MC/Mips/mips4/valid-xfail.s b/llvm/test/MC/Mips/mips4/valid-xfail.s
index ff6f457ca83..1dcf276457e 100644
--- a/llvm/test/MC/Mips/mips4/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips4/valid-xfail.s
@@ -7,34 +7,6 @@
 # XFAIL: *
 
         .set noat
-        c.eq.d          $fcc1,$f15,$f15
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
-        c.nge.s         $fcc3,$f11,$f8
-        c.ngl.s         $fcc2,$f31,$f23
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
-        c.seq.s         $fcc7,$f1,$f25
-        c.ueq.d         $fcc4,$f13,$f25
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
-        c.un.s          $fcc1,$f30,$f4
         madd.d          $f18,$f19,$f26,$f20
         madd.s          $f1,$f31,$f19,$f25
         msub.d          $f10,$f1,$f31,$f18
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index 949b91da922..6bd294ef2fd 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.l.d  $f1,$f3
         ceil.l.s  $f18,$f13
         ceil.w.d  $f11,$f25
diff --git a/llvm/test/MC/Mips/mips5/valid-xfail.s b/llvm/test/MC/Mips/mips5/valid-xfail.s
index 8d1d0d78d0e..2b60c6a4d25 100644
--- a/llvm/test/MC/Mips/mips5/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips5/valid-xfail.s
@@ -10,50 +10,22 @@
         abs.ps          $f22,$f8
         add.ps          $f25,$f27,$f13
         alnv.ps         $f12,$f18,$f30,$12
-        c.eq.d          $fcc1,$f15,$f15
         c.eq.ps         $fcc5,$f0,$f9
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
         c.f.ps          $fcc6,$f11,$f11
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
         c.le.ps         $fcc1,$f7,$f20
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
         c.lt.ps         $f19,$f5
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
         c.nge.ps        $f1,$f26
-        c.nge.s         $fcc3,$f11,$f8
         c.ngl.ps        $f21,$f30
-        c.ngl.s         $fcc2,$f31,$f23
         c.ngle.ps       $fcc7,$f12,$f20
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
         c.ngt.ps        $fcc5,$f30,$f6
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
         c.ole.ps        $fcc7,$f21,$f8
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
         c.olt.ps        $fcc3,$f7,$f16
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
         c.seq.ps        $fcc6,$f31,$f14
-        c.seq.s         $fcc7,$f1,$f25
         c.sf.ps         $fcc6,$f4,$f6
-        c.ueq.d         $fcc4,$f13,$f25
         c.ueq.ps        $fcc1,$f5,$f29
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
         c.ule.ps        $fcc6,$f17,$f3
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
         c.ult.ps        $fcc7,$f14,$f0
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
         c.un.ps         $fcc4,$f2,$f26
-        c.un.s          $fcc1,$f30,$f4
         cvt.ps.s        $f3,$f18,$f19
         cvt.s.pl        $f30,$f1
         cvt.s.pu        $f14,$f25
diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s
index 3afdee1887c..399cb9f04a6 100644
--- a/llvm/test/MC/Mips/mips5/valid.s
+++ b/llvm/test/MC/Mips/mips5/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.l.d  $f1,$f3
         ceil.l.s  $f18,$f13
         ceil.w.d  $f11,$f25
diff --git a/llvm/test/MC/Mips/mips64/valid-xfail.s b/llvm/test/MC/Mips/mips64/valid-xfail.s
index e5455f5d03d..7be86e60ba9 100644
--- a/llvm/test/MC/Mips/mips64/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips64/valid-xfail.s
@@ -13,50 +13,22 @@
         alnv.ob         $v31,$v23,$v30,$at
         alnv.ob         $v8,$v17,$v30,$a1
         alnv.ps         $f12,$f18,$f30,$12
-        c.eq.d          $fcc1,$f15,$f15
         c.eq.ps         $fcc5,$f0,$f9
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
         c.f.ps          $fcc6,$f11,$f11
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
         c.le.ps         $fcc1,$f7,$f20
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
         c.lt.ps         $f19,$f5
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
         c.nge.ps        $f1,$f26
-        c.nge.s         $fcc3,$f11,$f8
         c.ngl.ps        $f21,$f30
-        c.ngl.s         $fcc2,$f31,$f23
         c.ngle.ps       $fcc7,$f12,$f20
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
         c.ngt.ps        $fcc5,$f30,$f6
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
         c.ole.ps        $fcc7,$f21,$f8
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
         c.olt.ps        $fcc3,$f7,$f16
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
         c.seq.ps        $fcc6,$f31,$f14
-        c.seq.s         $fcc7,$f1,$f25
         c.sf.ps         $fcc6,$f4,$f6
-        c.ueq.d         $fcc4,$f13,$f25
         c.ueq.ps        $fcc1,$f5,$f29
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
         c.ule.ps        $fcc6,$f17,$f3
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
         c.ult.ps        $fcc7,$f14,$f0
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
         c.un.ps         $fcc4,$f2,$f26
-        c.un.s          $fcc1,$f30,$f4
         cvt.ps.s        $f3,$f18,$f19
         cvt.s.pl        $f30,$f1
         cvt.s.pu        $f14,$f25
diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s
index 1bd057d757d..6120664e0df 100644
--- a/llvm/test/MC/Mips/mips64/valid.s
+++ b/llvm/test/MC/Mips/mips64/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.l.d  $f1,$f3
         ceil.l.s  $f18,$f13
         ceil.w.d  $f11,$f25
diff --git a/llvm/test/MC/Mips/mips64r2/valid-xfail.s b/llvm/test/MC/Mips/mips64r2/valid-xfail.s
index 9ac47f63154..65f4bd8bc32 100644
--- a/llvm/test/MC/Mips/mips64r2/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips64r2/valid-xfail.s
@@ -36,50 +36,22 @@
         bmnz.v          $w15,$w2,$w28
         bmz.v           $w13,$w11,$w21
         bsel.v          $w28,$w7,$w0
-        c.eq.d          $fcc1,$f15,$f15
         c.eq.ps         $fcc5,$f0,$f9
-        c.eq.s          $fcc5,$f24,$f17
-        c.f.d           $fcc4,$f11,$f21
         c.f.ps          $fcc6,$f11,$f11
-        c.f.s           $fcc4,$f30,$f7
-        c.le.d          $fcc4,$f18,$f1
         c.le.ps         $fcc1,$f7,$f20
-        c.le.s          $fcc6,$f24,$f4
-        c.lt.d          $fcc3,$f9,$f3
         c.lt.ps         $f19,$f5
-        c.lt.s          $fcc2,$f17,$f14
-        c.nge.d         $fcc5,$f21,$f16
         c.nge.ps        $f1,$f26
-        c.nge.s         $fcc3,$f11,$f8
         c.ngl.ps        $f21,$f30
-        c.ngl.s         $fcc2,$f31,$f23
         c.ngle.ps       $fcc7,$f12,$f20
-        c.ngle.s        $fcc2,$f18,$f23
-        c.ngt.d         $fcc4,$f24,$f7
         c.ngt.ps        $fcc5,$f30,$f6
-        c.ngt.s         $fcc5,$f8,$f13
-        c.ole.d         $fcc2,$f16,$f31
         c.ole.ps        $fcc7,$f21,$f8
-        c.ole.s         $fcc3,$f7,$f20
-        c.olt.d         $fcc4,$f19,$f28
         c.olt.ps        $fcc3,$f7,$f16
-        c.olt.s         $fcc6,$f20,$f7
-        c.seq.d         $fcc4,$f31,$f7
         c.seq.ps        $fcc6,$f31,$f14
-        c.seq.s         $fcc7,$f1,$f25
         c.sf.ps         $fcc6,$f4,$f6
-        c.ueq.d         $fcc4,$f13,$f25
         c.ueq.ps        $fcc1,$f5,$f29
-        c.ueq.s         $fcc6,$f3,$f30
-        c.ule.d         $fcc7,$f25,$f18
         c.ule.ps        $fcc6,$f17,$f3
-        c.ule.s         $fcc7,$f21,$f30
-        c.ult.d         $fcc6,$f6,$f17
         c.ult.ps        $fcc7,$f14,$f0
-        c.ult.s         $fcc7,$f24,$f10
-        c.un.d          $fcc6,$f23,$f24
         c.un.ps         $fcc4,$f2,$f26
-        c.un.s          $fcc1,$f30,$f4
         cvt.ps.s        $f3,$f18,$f19
         cmp.eq.ph       $s7,$14
         cmp.le.ph       $8,$14
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index 7a2244a6642..40f3bf42893 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.l.d  $f1,$f3
         ceil.l.s  $f18,$f13
         ceil.w.d  $f11,$f25