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| author | Simon Dardis <simon.dardis@mips.com> | 2018-06-20 19:59:58 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-06-20 19:59:58 +0000 |
| commit | 6021424c102621097302215b8be4b49d5abbda08 (patch) | |
| tree | f4fc22a9e9f81d0940ccb41388136ff3143b1dfb /llvm/test/MC/Mips/mips4 | |
| parent | 5a4ec8127f7743f83dd17b2ef384958d54c4c95c (diff) | |
| download | bcm5719-llvm-6021424c102621097302215b8be4b49d5abbda08.tar.gz bcm5719-llvm-6021424c102621097302215b8be4b49d5abbda08.zip | |
[mips] Correct predicates for loads, bit manipulation instructions and some pseudos
Additionally, correct the definition of the rdhwr instruction.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D48216
llvm-svn: 335162
Diffstat (limited to 'llvm/test/MC/Mips/mips4')
| -rw-r--r-- | llvm/test/MC/Mips/mips4/invalid-mips32r2.s | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/mips4/invalid-mips32r2.s b/llvm/test/MC/Mips/mips4/invalid-mips32r2.s index 3e787585744..18dfc8a19a3 100644 --- a/llvm/test/MC/Mips/mips4/invalid-mips32r2.s +++ b/llvm/test/MC/Mips/mips4/invalid-mips32r2.s @@ -9,3 +9,5 @@ di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ext $1, $2, 4, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ins $1, $2, 4, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled |
