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| author | Artem Tamazov <artem.tamazov@amd.com> | 2016-04-25 14:13:51 +0000 |
|---|---|---|
| committer | Artem Tamazov <artem.tamazov@amd.com> | 2016-04-25 14:13:51 +0000 |
| commit | d6468666b540364feec63b5abed9aa428832fe8d (patch) | |
| tree | 8efdccb79942350a8a772d349eda9fc43cef6c54 /llvm/test/MC/Disassembler | |
| parent | 926bff8c3e3f3fd12395968423380b84caf087f1 (diff) | |
| download | bcm5719-llvm-d6468666b540364feec63b5abed9aa428832fe8d.tar.gz bcm5719-llvm-d6468666b540364feec63b5abed9aa428832fe8d.zip | |
[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.
Added hwreg(reg[,offset,width]) syntax.
Default offset = 0, default width = 32.
Possibility to specify 16-bit immediate kept.
Added out-of-range checks.
Disassembling is always to hwreg(...) format.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19329
llvm-svn: 267410
Diffstat (limited to 'llvm/test/MC/Disassembler')
| -rw-r--r-- | llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt b/llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt index 10767dad0b6..54a531e74b8 100644 --- a/llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt +++ b/llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt @@ -48,11 +48,11 @@ # VI: s_cbranch_i_fork s[2:3], 0x6 ; encoding: [0x06,0x00,0x02,0xb8] 0x06 0x00 0x02 0xb8 -# VI: s_getreg_b32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb8] -0x06 0x00 0x82 0xb8 +# VI: s_getreg_b32 s2, hwreg(6) ; encoding: [0x06,0xf8,0x82,0xb8] +0x06 0xf8 0x82 0xb8 -# VI: s_setreg_b32 0x6, s2 ; encoding: [0x06,0x00,0x02,0xb9] +# VI: s_setreg_b32 hwreg(6, 0, 1), s2 ; encoding: [0x06,0x00,0x02,0xb9] 0x06 0x00 0x02 0xb9 -# VI: s_setreg_imm32_b32 0x6, 0xff ; encoding: [0x06,0x00,0x00,0xba,0xff,0x00,0x00,0x00] -0x06 0x00 0x00 0xba 0xff 0x00 0x00 0x00 +# VI: s_setreg_imm32_b32 hwreg(5, 1, 31), 0xff ; encoding: [0x45,0xf0,0x00,0xba,0xff,0x00,0x00,0x00] +0x45 0xf0 0x00 0xba 0xff 0x00 0x00 0x00 |
