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| author | Oliver Stannard <oliver.stannard@arm.com> | 2015-11-26 15:32:30 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2015-11-26 15:32:30 +0000 |
| commit | 911ea20f07ab44f047bf4840efe99d41bf55047e (patch) | |
| tree | 15b49f05c1276b2759293df145a5e1a38b9abd4a /llvm/test/MC/Disassembler | |
| parent | 1a81cc9f43f08908b50c87749bab0890d3308a82 (diff) | |
| download | bcm5719-llvm-911ea20f07ab44f047bf4840efe99d41bf55047e.tar.gz bcm5719-llvm-911ea20f07ab44f047bf4840efe99d41bf55047e.zip | |
[AArch64] Add ARMv8.2-A UAO PSTATE bit
ARMv8.2-A adds a new PSTATE bit, PSTATE.UAO, which allows the LDTR/STTR
instructions to behave the same as LDR/STR with respect to execute-only
pages at higher privilege levels. New variants of the MSR/MRS
instructions are added to allow reading and writing this bit. It is a
required part of ARMv8.2-A, so no additional subtarget features are
required.
Differential Revision: http://reviews.llvm.org/D15020
llvm-svn: 254157
Diffstat (limited to 'llvm/test/MC/Disassembler')
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt b/llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt new file mode 100644 index 00000000000..b8300f4c726 --- /dev/null +++ b/llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt @@ -0,0 +1,19 @@ +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.2a --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s 2>&1 | FileCheck --check-prefix=NO_V82A %s + +[0x7f,0x40,0x00,0xd5] +[0x7f,0x41,0x00,0xd5] +[0x7f,0x42,0x00,0xd5] +# CHECK: msr UAO, #0 +# CHECK: msr UAO, #1 +# CHECK: msr S0_0_C4_C2_3, xzr +# NO_V82A: msr S0_0_C4_C0_3, xzr +# NO_V82A: msr S0_0_C4_C1_3, xzr +# NO_V82A: msr S0_0_C4_C2_3, xzr + +[0x81,0x42,0x18,0xd5] +[0x82,0x42,0x38,0xd5] +# CHECK: msr UAO, x1 +# CHECK: mrs x2, UAO +# NO_V82A: msr S3_0_C4_C2_4, x1 +# NO_V82A: mrs x2, S3_0_C4_C2_4 |
