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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-05 15:28:33 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-05 15:28:33 +0000 |
| commit | bbfd5287489fe2a55d71097c6e4914ace20d7d7f (patch) | |
| tree | 02a009dc939f55be1b9640ab4834e191b0b70970 /llvm/test/MC/Disassembler/Mips/mips32r2 | |
| parent | 0411e8669b82233a645fd6dcdc813e989eef25c6 (diff) | |
| download | bcm5719-llvm-bbfd5287489fe2a55d71097c6e4914ace20d7d7f.tar.gz bcm5719-llvm-bbfd5287489fe2a55d71097c6e4914ace20d7d7f.zip | |
Revert "[mips] Add rsqrt, recip for MIPS"
This reverts commit r282485 which contain two patches instead of
one.
llvm-svn: 283327
Diffstat (limited to 'llvm/test/MC/Disassembler/Mips/mips32r2')
3 files changed, 4 insertions, 8 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt index 5a374ac43cb..82a883557e8 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt @@ -135,12 +135,8 @@ 0x67 0x45 0xc9 0x34 # CHECK: ori $9, $6, 17767 0xc2 0x49 0x26 0x00 # CHECK: rotr $9, $6, 7 0x46 0x48 0xe6 0x00 # CHECK: rotrv $9, $6, $7 -0x95 0x34 0x20 0x46 # CHECK: recip.d $f18, $f6 -0xd5 0xf0 0x00 0x46 # CHECK: recip.s $f3, $f30 0x0c 0x73 0x20 0x46 # CHECK: round.w.d $f12, $f14 0x8c 0x39 0x00 0x46 # CHECK: round.w.s $f6, $f7 -0x96 0xe0 0x20 0x46 # CHECK: rsqrt.d $f2, $f28 -0x16 0x41 0x00 0x46 # CHECK: rsqrt.s $f4, $f8 0xc6 0x23 0xa4 0xa0 # CHECK: sb $4, 9158($5) 0x06 0x00 0xa4 0xa0 # CHECK: sb $4, 6($5) 0xc6 0x23 0xe9 0xe0 # CHECK: sc $9, 9158($7) diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt index 9935929a1cc..7ee4f4bf7fa 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt @@ -286,10 +286,6 @@ 0x46 0x80 0x5e 0xa1 # CHECK: cvt.d.w $f26, $f11 0x46 0x80 0x73 0x21 # CHECK: cvt.d.w $f12, $f14 0x46 0x80 0x7d 0xa0 # CHECK: cvt.s.w $f22, $f15 -0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6 -0x46 0x00 0xf0 0xd5 # CHECK: recip.s $f3, $f30 -0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28 -0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 0x4c 0xa6 0x00 0x05 # CHECK: luxc1 $f0, $6($5) 0x4c 0xac 0xc8 0x30 # CHECK: nmadd.s $f0, $f5, $f25, $f12 diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt index bc7ae8dd839..da8130c9f4c 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt @@ -70,9 +70,13 @@ 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 0x41 0x49 0x98 0x00 # CHECK: rdpgpr s3, t1 +0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6 +0x46 0x00 0xf0 0xd5 # CHECK: recip.s $f3, $f30 0x02 0xa7 0x68 0x46 # CHECK: rorv t5, a3, s5 0x46 0x20 0x03 0x08 # CHECK: round.l.d $f12, $f0 0x46 0x00 0x2e 0x08 # CHECK: round.l.s $f24, $f5 +0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28 +0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22 0x46 0x00 0xff 0x09 # CHECK: trunc.l.s $f28, $f31 |
