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authorJohn Brawn <john.brawn@arm.com>2015-05-22 14:16:22 +0000
committerJohn Brawn <john.brawn@arm.com>2015-05-22 14:16:22 +0000
commitc815a969c714b5c6e43eb10c59761dd29a5c5f52 (patch)
tree2af31990c0d06fa533b5b7a070b81d2549c56554 /llvm/test/MC/ARM
parent8afcd0a71ad45a76600fb655e15568b284058fce (diff)
downloadbcm5719-llvm-c815a969c714b5c6e43eb10c59761dd29a5c5f52.tar.gz
bcm5719-llvm-c815a969c714b5c6e43eb10c59761dd29a5c5f52.zip
[ARM] Fix typo in subtarget feature list for 7em triple
The list of subtarget features for the 7em triple contains 't2xtpk', which actually disables that subtarget feature. Correct that to '+t2xtpk' and test that the instructions enabled by that feature do actually work. Differential Revision: http://reviews.llvm.org/D9936 llvm-svn: 238022
Diffstat (limited to 'llvm/test/MC/ARM')
-rw-r--r--llvm/test/MC/ARM/thumb2-dsp-diag.s34
1 files changed, 22 insertions, 12 deletions
diff --git a/llvm/test/MC/ARM/thumb2-dsp-diag.s b/llvm/test/MC/ARM/thumb2-dsp-diag.s
index cb0e7744ef4..a87c2120d5a 100644
--- a/llvm/test/MC/ARM/thumb2-dsp-diag.s
+++ b/llvm/test/MC/ARM/thumb2-dsp-diag.s
@@ -1,24 +1,34 @@
-; RUN: not llvm-mc -triple=thumbv7m < %s 2> %t
-; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
+@ RUN: not llvm-mc -triple=thumbv7m 2>&1 < %s | FileCheck --check-prefix=CHECK-ERRORS %s
+@ RUN: llvm-mc -triple=thumbv7em -show-encoding < %s | FileCheck --check-prefix=CHECK-7EM %s
sxtab r0, r0, r0
sxtah r0, r0, r0
sxtab16 r0, r0, r0
sxtb16 r0, r0
sxtb16 r0, r0, ror #8
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-7EM: sxtab r0, r0, r0 @ encoding: [0x40,0xfa,0x80,0xf0]
+@ CHECK-7EM: sxtah r0, r0, r0 @ encoding: [0x00,0xfa,0x80,0xf0]
+@ CHECK-7EM: sxtab16 r0, r0, r0 @ encoding: [0x20,0xfa,0x80,0xf0]
+@ CHECK-7EM: sxtb16 r0, r0 @ encoding: [0x2f,0xfa,0x80,0xf0]
+@ CHECK-7EM: sxtb16 r0, r0, ror #8 @ encoding: [0x2f,0xfa,0x90,0xf0]
uxtab r0, r0, r0
uxtah r0, r0, r0
uxtab16 r0, r0, r0
uxtb16 r0, r0
uxtb16 r0, r0, ror #8
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: instruction requires: arm-mode
-; CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: instruction requires: arm-mode
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-7EM: uxtab r0, r0, r0 @ encoding: [0x50,0xfa,0x80,0xf0]
+@ CHECK-7EM: uxtah r0, r0, r0 @ encoding: [0x10,0xfa,0x80,0xf0]
+@ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
+@ CHECK-7EM: uxtb16 r0, r0 @ encoding: [0x3f,0xfa,0x80,0xf0]
+@ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
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