Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful.

I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.

llvm-svn: 117530

16 files changed, 30 insertions, 0 deletions

diff --git a/llvm/test/MC/ARM/neon-absdiff-encoding.ll b/llvm/test/MC/ARM/neon-absdiff-encoding.ll
index f0adf39467e..8c649f1576e 100644
--- a/llvm/test/MC/ARM/neon-absdiff-encoding.ll
+++ b/llvm/test/MC/ARM/neon-absdiff-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vabds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
diff --git a/llvm/test/MC/ARM/neon-add-encoding.ll b/llvm/test/MC/ARM/neon-add-encoding.ll
index 1bffba0c4f2..62290fb65c9 100644
--- a/llvm/test/MC/ARM/neon-add-encoding.ll
+++ b/llvm/test/MC/ARM/neon-add-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vadd_8xi8
 define <8 x i8> @vadd_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {                                                                          
   %tmp1 = load <8 x i8>* %A
diff --git a/llvm/test/MC/ARM/neon-bitwise-encoding.ll b/llvm/test/MC/ARM/neon-bitwise-encoding.ll
index 3a3ba9266a8..ebfff6025e1 100644
--- a/llvm/test/MC/ARM/neon-bitwise-encoding.ll
+++ b/llvm/test/MC/ARM/neon-bitwise-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; FIXME: The following instructions still require testing:
 ;  - vand with immediate, vorr with immediate
 ;  - both vbit and vbif
diff --git a/llvm/test/MC/ARM/neon-cmp-encoding.ll b/llvm/test/MC/ARM/neon-cmp-encoding.ll
index c12bef035bd..2600a98639d 100644
--- a/llvm/test/MC/ARM/neon-cmp-encoding.ll
+++ b/llvm/test/MC/ARM/neon-cmp-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; FIXME: We cannot currently test the following instructions, which are 
 ; currently marked as for-disassembly only in the .td files:
 ;  - VCEQz
diff --git a/llvm/test/MC/ARM/neon-minmax-encoding.ll b/llvm/test/MC/ARM/neon-minmax-encoding.ll
index 913519eb911..6108ab60ec5 100644
--- a/llvm/test/MC/ARM/neon-minmax-encoding.ll
+++ b/llvm/test/MC/ARM/neon-minmax-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
diff --git a/llvm/test/MC/ARM/neon-mul-accum-encoding.ll b/llvm/test/MC/ARM/neon-mul-accum-encoding.ll
index 3543a42fa2d..20f93cc5fc5 100644
--- a/llvm/test/MC/ARM/neon-mul-accum-encoding.ll
+++ b/llvm/test/MC/ARM/neon-mul-accum-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vmla_8xi8
 define <8 x i8> @vmla_8xi8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8> * %C) nounwind {
 	%tmp1 = load <8 x i8>* %A
diff --git a/llvm/test/MC/ARM/neon-mul-encoding.ll b/llvm/test/MC/ARM/neon-mul-encoding.ll
index 907ff1881c4..79513a122dd 100644
--- a/llvm/test/MC/ARM/neon-mul-encoding.ll
+++ b/llvm/test/MC/ARM/neon-mul-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vmul_8xi8
 define <8 x i8> @vmul_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
diff --git a/llvm/test/MC/ARM/neon-pairwise-encoding.ll b/llvm/test/MC/ARM/neon-pairwise-encoding.ll
index d8ef1921770..f7fea53c8bf 100644
--- a/llvm/test/MC/ARM/neon-pairwise-encoding.ll
+++ b/llvm/test/MC/ARM/neon-pairwise-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vpadd.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vpadd.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
diff --git a/llvm/test/MC/ARM/neon-reciprocal-encoding.ll b/llvm/test/MC/ARM/neon-reciprocal-encoding.ll
index cab5e938079..85fd65f2762 100644
--- a/llvm/test/MC/ARM/neon-reciprocal-encoding.ll
+++ b/llvm/test/MC/ARM/neon-reciprocal-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone
 declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone
 
diff --git a/llvm/test/MC/ARM/neon-satshift-encoding.ll b/llvm/test/MC/ARM/neon-satshift-encoding.ll
index 4cf6b1d5eac..0f0bee26afc 100644
--- a/llvm/test/MC/ARM/neon-satshift-encoding.ll
+++ b/llvm/test/MC/ARM/neon-satshift-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @vqshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
 	%tmp2 = load <8 x i8>* %B
diff --git a/llvm/test/MC/ARM/neon-shift-encoding.ll b/llvm/test/MC/ARM/neon-shift-encoding.ll
index bc8aeee5092..8a4780e0161 100644
--- a/llvm/test/MC/ARM/neon-shift-encoding.ll
+++ b/llvm/test/MC/ARM/neon-shift-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vshls_8xi8
 define <8 x i8> @vshls_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
diff --git a/llvm/test/MC/ARM/neon-shiftaccum-encoding.ll b/llvm/test/MC/ARM/neon-shiftaccum-encoding.ll
index e2e71092b7b..ab6630cf3c1 100644
--- a/llvm/test/MC/ARM/neon-shiftaccum-encoding.ll
+++ b/llvm/test/MC/ARM/neon-shiftaccum-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @vsras8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
 	%tmp2 = load <8 x i8>* %B
diff --git a/llvm/test/MC/ARM/neon-shuffle-encoding.ll b/llvm/test/MC/ARM/neon-shuffle-encoding.ll
index 273a5288599..98ccf425c6d 100644
--- a/llvm/test/MC/ARM/neon-shuffle-encoding.ll
+++ b/llvm/test/MC/ARM/neon-shuffle-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
 	%tmp2 = load <8 x i8>* %B
diff --git a/llvm/test/MC/ARM/neon-sub-encoding.ll b/llvm/test/MC/ARM/neon-sub-encoding.ll
index 94a2639d202..5ebbc63e511 100644
--- a/llvm/test/MC/ARM/neon-sub-encoding.ll
+++ b/llvm/test/MC/ARM/neon-sub-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vsub_8xi8
 define <8 x i8> @vsub_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
 	%tmp1 = load <8 x i8>* %A
diff --git a/llvm/test/MC/ARM/neon-table-encoding.ll b/llvm/test/MC/ARM/neon-table-encoding.ll
index 1352855fba7..285b0970b21 100644
--- a/llvm/test/MC/ARM/neon-table-encoding.ll
+++ b/llvm/test/MC/ARM/neon-table-encoding.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
 
 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
 %struct.__neon_int8x8x3_t = type { <8 x i8>,  <8 x i8>, <8 x i8> }
diff --git a/llvm/test/MC/ARM/simple-fp-encoding.ll b/llvm/test/MC/ARM/simple-fp-encoding.ll
index b941069244d..f807757be2d 100644
--- a/llvm/test/MC/ARM/simple-fp-encoding.ll
+++ b/llvm/test/MC/ARM/simple-fp-encoding.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
 
+; XFAIL: *
 
 ; FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
 ;        should run on .s source files rather than using llc to generate the