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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
| commit | 2a57b357a3a0de2202a3fb0272d2648a205bcdfa (patch) | |
| tree | 7a78591803955adc522b572bfac72a8ce8e58e15 /llvm/test/MC/ARM/armv8.4a-trace-error.s | |
| parent | be4c2933a2c370d292122fc2187d75436aeaea83 (diff) | |
| download | bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.tar.gz bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.zip | |
[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction.
Differential Revision: https://reviews.llvm.org/D48918
llvm-svn: 336418
Diffstat (limited to 'llvm/test/MC/ARM/armv8.4a-trace-error.s')
| -rw-r--r-- | llvm/test/MC/ARM/armv8.4a-trace-error.s | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/armv8.4a-trace-error.s b/llvm/test/MC/ARM/armv8.4a-trace-error.s new file mode 100644 index 00000000000..7ec80408f0e --- /dev/null +++ b/llvm/test/MC/ARM/armv8.4a-trace-error.s @@ -0,0 +1,20 @@ +// RUN: not llvm-mc -triple arm -mattr=+v8.4a -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: not llvm-mc -triple thumb -mattr=+v8.4a -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR + +tsb +tsb 0 +tsb #0 +tsb foo + +//CHECK-ERROR: error: too few operands for instruction +//CHECK-ERROR: tsb +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: tsb 0 +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: tsb #0 +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: tsb foo +//CHECK-ERROR: ^ |
