[AArch64][SVE] Asm: Support for predicated unary operations.

This patch adds support for the following instructions:
  CLS  (Count Leading Sign bits)
  CLZ  (Count Leading Zeros)
  CNT  (Count non-zero bits)
  CNOT (Logically invert boolean condition in vector)
  NOT  (Bitwise invert vector)
  FABS (Floating-point absolute value)
  FNEG (Floating-point negate)

All operations are predicated and unary, e.g.
  clz  z0.s, p0/m, z1.s

- CLS, CLZ, CNT, CNOT and NOT have variants for 8, 16, 32
  and 64 bit elements.

- FABS and FNEG have variants for 16, 32 and 64 bit elements.

llvm-svn: 336677

1 files changed, 18 insertions, 0 deletions

diff --git a/llvm/test/MC/AArch64/SVE/clz-diagnostics.s b/llvm/test/MC/AArch64/SVE/clz-diagnostics.s
new file mode 100644
index 00000000000..242b9330218
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/clz-diagnostics.s
@@ -0,0 +1,18 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+clz     z31.b, p8/m, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: clz     z31.b, p8/m, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+clz     z31.b, p7/m, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: clz     z31.b, p7/m, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: