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| author | Craig Topper <craig.topper@intel.com> | 2018-01-25 06:57:42 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-25 06:57:42 +0000 |
| commit | b369cdbaadb9ed3bc92d51f4361233d065ecdd4b (patch) | |
| tree | 57471bf92541f339ade3f8bcb63d13146951d3df /llvm/test/Linker | |
| parent | 795b17f4fb47a6f963ad861a4a18d8d4e11701a5 (diff) | |
| download | bcm5719-llvm-b369cdbaadb9ed3bc92d51f4361233d065ecdd4b.tar.gz bcm5719-llvm-b369cdbaadb9ed3bc92d51f4361233d065ecdd4b.zip | |
[X86] Expand IMUL/MUL instregexs in Intel scheduler models. Add load latency to some of them in SkylakeClient model.
The regular expressions and the imul names caused some instructions to be matched by multiple regexs creating unpredictable results.
This changes them all to use explicit instrs instead.
While doing this I also found that some instructions in Skylake were missing load latency so I fixed that too.
llvm-svn: 323406
Diffstat (limited to 'llvm/test/Linker')
0 files changed, 0 insertions, 0 deletions
