[DagCombiner] Not all 'andn''s work with immediates.

Summary:
Split off from D46031.

In masked merge case, this degrades IPC by decreasing instruction count.
{F6108777}
The next patch should be able to recover and improve this.

This also affects the transform @spatel have added in D27489 / rL289738,
and the test coverage for X86 was missing.
But after i have added it, and looked at the changes in MCA, i'm somewhat confused.
{F6093591} {F6093592} {F6093593}
I'd say this regression is an improvement, since `IPC` increased in that case?

Reviewers: spatel, craig.topper

Reviewed By: spatel

Subscribers: andreadb, llvm-commits, spatel

Differential Revision: https://reviews.llvm.org/D46493

llvm-svn: 331684

3 files changed, 16 insertions, 17 deletions

diff --git a/llvm/test/CodeGen/X86/icmp-opt.ll b/llvm/test/CodeGen/X86/icmp-opt.ll
index 6278fb841f8..b7cc53fcf57 100644
--- a/llvm/test/CodeGen/X86/icmp-opt.ll
+++ b/llvm/test/CodeGen/X86/icmp-opt.ll
@@ -17,9 +17,9 @@ define i32 @t1(i64 %a) {
 ;
 ; CHECK-BMI-LABEL: t1:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    shrq $63, %rdi
-; CHECK-BMI-NEXT:    xorl $1, %edi
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testq %rdi, %rdi
+; CHECK-BMI-NEXT:    setns %al
 ; CHECK-BMI-NEXT:    retq
   %cmp = icmp sgt i64 %a, -1
   %conv = zext i1 %cmp to i32
diff --git a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
index 1390b9a013d..833ac1dfe2d 100644
--- a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
+++ b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
@@ -101,10 +101,10 @@ define i32 @pos_sel_constants(i32 %a) {
 ;
 ; CHECK-BMI-LABEL: pos_sel_constants:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    sarl $31, %edi
-; CHECK-BMI-NEXT:    notl %edi
-; CHECK-BMI-NEXT:    andl $5, %edi
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testl %edi, %edi
+; CHECK-BMI-NEXT:    setns %al
+; CHECK-BMI-NEXT:    leal (%rax,%rax,4), %eax
 ; CHECK-BMI-NEXT:    retq
   %tmp.1 = icmp sgt i32 %a, -1
   %retval = select i1 %tmp.1, i32 5, i32 0
@@ -124,10 +124,10 @@ define i32 @pos_sel_special_constant(i32 %a) {
 ;
 ; CHECK-BMI-LABEL: pos_sel_special_constant:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    shrl $22, %edi
-; CHECK-BMI-NEXT:    notl %edi
-; CHECK-BMI-NEXT:    andl $512, %edi # imm = 0x200
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    xorl %eax, %eax
+; CHECK-BMI-NEXT:    testl %edi, %edi
+; CHECK-BMI-NEXT:    setns %al
+; CHECK-BMI-NEXT:    shll $9, %eax
 ; CHECK-BMI-NEXT:    retq
   %tmp.1 = icmp sgt i32 %a, -1
   %retval = select i1 %tmp.1, i32 512, i32 0
diff --git a/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll b/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
index a28a7edf656..d80ebded434 100644
--- a/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
+++ b/llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
@@ -657,11 +657,10 @@ define i32 @in_constant_varx_42(i32 %x, i32 %y, i32 %mask) {
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42:
 ; CHECK-BMI:       # %bb.0:
+; CHECK-BMI-NEXT:    xorl $42, %edi
 ; CHECK-BMI-NEXT:    andl %edx, %edi
-; CHECK-BMI-NEXT:    notl %edx
-; CHECK-BMI-NEXT:    andl $42, %edx
-; CHECK-BMI-NEXT:    orl %edi, %edx
-; CHECK-BMI-NEXT:    movl %edx, %eax
+; CHECK-BMI-NEXT:    xorl $42, %edi
+; CHECK-BMI-NEXT:    movl %edi, %eax
 ; CHECK-BMI-NEXT:    retq
   %n0 = xor i32 %x, 42 ; %x
   %n1 = and i32 %n0, %mask
@@ -705,9 +704,9 @@ define i32 @in_constant_varx_42_invmask(i32 %x, i32 %y, i32 %mask) {
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42_invmask:
 ; CHECK-BMI:       # %bb.0:
+; CHECK-BMI-NEXT:    xorl $42, %edi
 ; CHECK-BMI-NEXT:    andnl %edi, %edx, %eax
-; CHECK-BMI-NEXT:    andl $42, %edx
-; CHECK-BMI-NEXT:    orl %edx, %eax
+; CHECK-BMI-NEXT:    xorl $42, %eax
 ; CHECK-BMI-NEXT:    retq
   %notmask = xor i32 %mask, -1
   %n0 = xor i32 %x, 42 ; %x